Abstract: An intermediate switching station or exchange, designed to establish temporary connections between calling and called lines of a telephone or other telecommunication system, is connected via n multichannel links to as many trunk terminals, the m channels of each link being represented by or converted into respective time slots of a PCM message frame of (m+2) time slots which also include a special time slot for switching codes. The code words from the special time slots of all incoming links are interleaved in a PCM switching frame of (m+2) time slots, with (n+1) such frames constituting a recurrent superframe carrying switching codes from all lines served by the exchange. A signalization coordinator converts the switching codes extracted from the superframe into signals for the actuation of a switching-control unit and reconverts response signals from that unit into switching codes to be inserted into outgoing message frames.

Abstract: A marker designed to control a switching circuit for extending an outgoing call to a remote junction, identified by a characteristic digit or digit combination at the beginning of a call number emitted by a local subscriber, includes a first and a second memory connected in tandem via an intervening decoder, the first memory having respective cells addressable by all possible digits and digit combinations forming part of the characteristic call-number portion. The code words stored in these cells are translated by the decoder into (a) a signal ni indicating a nonexisting junction, (b) a signal ci denoting an incomplete characteristic, or (c) a signal if addressing a cell of the second memory to select a transmission path leading to a fully identified junction.

Abstract: The outlying stations of a videotelephone system, adapted to communicate with one another through a central office, include each a video-reception section and a video-transmission section as well as an audio section provided with telephone equipment. A sync-pulse generator in the video-transmission section, comprising a crystal-controlled oscillator working into a pair of frequency dividers, controls the line-scan and frame-scan generators thereof as well as those of a remote station to which it is connected via an outgoing video line. A local sync-pulse extractor connected to an incoming video line controls the line-scan and frame-scan generators of the associated video-reception section.

Abstract: Analog-voltage samples to be transmitted in digital form over a communication channel, ranging between a lower and an upper limit V.sub.min and V.sub.max, are quantized in 2.sup.n levels with 2.sup.n/2 major quantum steps each subdivided into 2.sup.n/3 minor quantum steps represented by n-bit words, a group of n/2 bits of each word representing the major quantum steps and another group of n/2 bits representing the minor quantum steps. A converter at the transmitting end includes a first and a second constant-current generator, of high and low rate respectively, which are sequentially activated to discharge and to charge an input capacitor temporarily storing an analog-voltage sample to be digitized. The first generator rapidly discharges the input capacitor while an associated first pulse counter receives a series of forward-counting clock pulses, each pulse corresponding to a major quantum step, until the absolute value of the capacitor voltage drops below that of a predetermined reference voltage V.sub.

Abstract: A multiplicity of subscriber lines, originating at telephone stations equipped partly with dials and partly with keyboard-controlled multifrequency generators, are connected to pulse-responsive selection equipment by way of switching circuits which are under the control of respective key-signal detectors. Upon the operation of any multifrenquency generator, the latter emits a key signal which actuates the associated detector to switch that line to a conversion network wherein the incoming frequency combinations are translated into binary codes which are stored in a dynamic memory whence they are read out into an available binary/decimal converter. The stored binary codes are accompanied by a line address which enables a coupler to reinsert the selection signals, in the form of digital pulse trains, into the correct line with the aid of an associated interface unit.

Abstract: A two-wire line is connected via a resistive hybrid circuit to a high-impedance output of a transmitter amplifier, carrying outgoing voice signals originating at a microphone, and to a high-impedance input of a receiver amplifier, carrying incoming voice signals destined for an earphone. A biasing network, connected across the line in parallel with the hybrid circuit, includes a pair of cascaded complementary transistors whose collectors are interconnected through a low-ohmic voltage divider supplying operating voltage, balanced with reference to the line voltage, to the transmitter ampllifier and delivering a similarly balanced reference voltage to the receiver amplifier.

Abstract: A station for the transmission and reception of electromagnetic waves (e.g. from a communication satellite in stationary earth orbit), operating in a multichannel band with two conjugate polarizations, includes a regenerative distortion compensator in a receiving waveguide branch and a predistorter in a transmitting waveguide branch, both controlled by a processor responsive to output signals from a subsequent i-f stage in which a distortion monitor measures cross-talk between the two polarizations on the basis of two central beacons extracted from the incoming message band.

Abstract: In order to detect the presence of voice frequencies on a telephone line which is periodically sampled for monitoring its activity, with conversion of resulting analog samples into binary words each including a polarity bit, the polarity bits of successive samples of a given line are fed to a zero-crossing detector emitting a pulse on every polarity reversal. The pulses pass through a shift register, which is stepped at the sampling rate, into a counter whose count is periodically read to determine whether a line-signal frequency, as represented by the number of zero crossings per test interval, or the rate of change of that frequency exceeds a certain threshold to indicate a fricative or sibilant sound introducing a spoken syllable.

Abstract: In order to suppress cross-talk between channels using adjoining time slots in a time-division-multiplex (TDM) communication system, the message signals are carried by a transmission line with two conductors, of a maximum effective thickness on the order of magnitude of the penetration depth .delta. of the current, separated by a layer of a substantially nonpolarizable dielectric material such as polyethylene or Teflon. The conductors may be parallel strips or coaxial; in the latter case, either or both could be a solid foil of the specified thickness or could be composed of one or more litz wires whose strands have that thickness.

Abstract: In order to enable the transmission of digital pulses under the control of a pushbutton-type call-number selector from a dial-equipped subscriber station, the output leads of a keyboard are connected on the one hand to a circulating memory, working into a pulse generator, and on the other hand to a timing network which responds to the depression of any pushbutton on the keyboard with emission of an enabling pulse making the memory receptive to the selected code combination. The timing network includes a delay network which briefly retards the enabling pulse to prevent the storage of spurious signals in response to transient energization of an output lead of the keyboard.

Abstract: An integrated circuit for the selective completion and interruption of a signal path comprises three transistors of the MOSFET type, i.e., a switching transistor in tandem with a decoupling transistor and a pilot transistor in cascade with the switching transistor. The channels of the switching and decoupling transistors lie in series between supply terminals of opposite potential, together with a load resistor. The channel of the pilot transistor is connected across the same supply terminals by way of a biasing resistor tied to the gate of the switching transistor. On/off voltages are applied to the gate of the pilot transistor while incoming signals are fed to the gate of the decoupling transistor.

Abstract: To demodulate an incoming oscillation consisting of a succession of distinct signal frequencies, particularly in a data-transmission system using an alternation of two keying frequencies, the incoming oscillation is squared and then passed through a differentiator deriving a pair of closely spaced trigger pulses from any zero crossing of the incoming oscillation. The first trigger pulse causes the transfer of the contents of a buffer register, receiving the reading of a pulse counter, into a digital/analog converter whose output is compared with a reference voltage in a threshold circuit; the second trigger pulse resets the counter which receives locally generated clock pulses whose cadence is high compared to the signal frequencies.

Abstract: A code receiver of a data-transmission system, using regular or abbreviated cyclic codes wherein each n-bit code word consists of k information bits and (n-k) redundancy bits together constituting the coefficients of a complex polynomial which is a multiple of a predetermined generator polynomial, comprises a shift register for the incoming code words with (n+2s) stages. The n central stages of that shift register temporarily store, during each transmission cycle, the n bits of the code word while the last s bits of the immediately preceding word and the first s bits of the immediately following word are stored in respective supplemental stages.

Abstract: A detector stage at a receiving station of a telecommunication system derives from an incoming modulated carrier a constant reference voltage lower than the minimum amplitude of the detected modulation signals which are fed to the base of an NPN transistor whose emitter receives the reference voltage through a resistor. The collector of the transistor, cut off from any direct-current supply, is coupled to a subsequent audio stage through a series capacitor and to ground through a shunt capacitor. Normally, the transistor is saturated and its emitter potential, closely following its base voltage, is practically duplicated on its collector. In the presence of large static, however, the noise pulses cut off the transistor as the shunt capacitor temporarily stores the magnitude of the immediately preceding signal amplitude.

Abstract: Amplitude samples of voice signals to be transmitted by pulse-code modulation are compared with a quasi-exponential reference voltage generated during each sampling interval while a binary counter receives a train of isochronous clock pulses, the reading of the counter at the instant of a match being stored in a memory for subsequent insertion into a message frame. Positive and negative signals are distinguished by a sign bit preceding the amplitude code; in one embodiment the reference voltage is sequentially generated with opposite polarities in successive halves of a sampling interval, the counter having an additional stage to generate the sign bit. Decoding at the receiving end is achieved with the aid of another binary counter whose output is compared with the amplitude code and, in the event of a match, causes the instantaneous value of a similar reference voltage to be sampled and stored for subsequent integration.

Abstract: A telephone exchange of the time-division-multiplex type is provided with several synchronized circulating memories whose operating cycle is divided into, say, 100 phases corresponding to respective time slots of a communication frame whereby a multiplicity of conversations can be initiated and carried on simultaneously between calling and responding subscribers. These memories include a caller memory I, a responder memory N, a monitoring memory LP, a counting memory LK, and two ancillary memories LT.sub.1, LT.sub.2 respectively associated with the caller and the responder. Monitoring memory LP, registering the progress of a call in a corresponding phase thereof, defines up to 10 different states in the establishment of a connection; in the event of a toll call, state No. 10 is followed by either state No. 11 or state No. 12, depending on whether the charge is to be debited to the calling or the called party, wherever a supervisory unit emits a rate pulse.

Abstract: A network for the temporary storage of binary code words, such as calling digits accompanied by line-identification signals in a telecommunication system, includes a multistage shift register together with a one-stage buffer register and a one-stage extraction register, each stage accommodating a multiplicity of calling and identification bits together with a discriminating bit indicating the availability or non-availability of an outgoing channel to which the accompanying code word is to be transmitted. The three registers are cascaded in a loop for continuous recirculation in a recurrent cycle of z time slots, z being the number of register stages (514 in the specific example given), of the code words accompanied by availability bits; the code words are read out from the loop between the extraction and buffer registers.

Abstract: A central office of a videotelephone system has a cross-bar switch to establish connections between incoming and outgoing video lines terminating at the transmitters and receivers of the videotelephone sets of the several outlying stations. A central sync-pulse generator works into the incoming video lines to control the sweep circuits of the video receivers of stations to which connections have been established, each video receiver being linked with the associated video transmitter through a delay circuit which actuates the line-scan generators of the transmitter and of the receiver with a relative offset compensating for the transit time of the sync pulses between the central office and the station. The sync pulses are supplied to each incoming video line through an amplifier stage preceded by a shunt circuit including a transistor to which quenching pulses for grounding the line are periodically applied by the sync-pulse generator.

Abstract: A receiver of n-bit data words, each consisting of k information bits and (n-1) redundancy bits, comprises three error detectors receiving the incoming bit stream in parallel with one another and with a shift register of a transfer circuit, the three error detectors being triggered by timing pulses fed to them in staggered relationship from a clock circuit extracting synchronizing signals from the bit stream. In normal operation, the middle detector generates a recurrent no-error output signal which has no effect upon the cadence of the timing pulses. If either of the two other detectors emits such a no-error output signal in response to a forward or a backward slip by a predetermined number of bits h, the clock circuit is reset to compensate for the slip. The emission of an output signal from any error detector causes the readout of the received bits from the shift register in the transfer circuit.