Patents Assigned to Sony Semiconductor Solution Corporation
  • Patent number: 11716553
    Abstract: An imaging device according to an embodiment of the present disclosure includes: a plurality of current sources including first group current sources and second group current sources; and a control unit that controls driving of the first group current sources to generate a first-phase ramp voltage and controls driving of the first group current sources and at least one current source of the second group current sources to generate a second-phase ramp voltage.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: August 1, 2023
    Assignee: Sony Semiconductor Solution Corporation
    Inventors: Tomoki Watanabe, Kyoichi Takenaka
  • Patent number: 11653119
    Abstract: In a solid-state image sensor provided with a comparator that compares a reference signal and a pixel signal, the image quality of image data is improved. A voltage divider circuit supplies a divided voltage of an input voltage and a predetermined reference voltage that are input. An input-side differential transistor outputs a drain current corresponding to the gate-source voltage between the divided voltage input to the gate and a predetermined source voltage. An output-side differential transistor outputs a voltage corresponding to the drain current as a result of comparison between the input voltage and the reference voltage. A control transistor reduces the gate-source voltage in a case where the input voltage is out of a predetermined range.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: May 16, 2023
    Assignee: Sony Semiconductor Solution Corporation
    Inventors: Sachio Akebono, Yosuke Ueno
  • Patent number: 11483507
    Abstract: There is provided a solid-state image pickup element including: a photodiode configured to convert incident light into a photocurrent; an amplification transistor configured to amplify a voltage between a gate having a potential depending on the photocurrent and a source having a predetermined reference potential and output the amplified voltage from a drain; and a potential supply section configured to supply an anode of the photodiode and a back-gate of the amplification transistor with a predetermined potential lower than the reference potential.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: October 25, 2022
    Assignee: Sony Semiconductor Solution Corporation
    Inventor: Atsumi Niwa
  • Patent number: 11336855
    Abstract: An analog-digital converter that includes voltage acquisition circuitry that acquires a voltage value of an analog signal in a settling period, calculation circuitry that calculates a predicted convergence voltage value of the analog signal based on the voltage value of the acquired analog signal, reference signal generation circuitry that generates a ramp wave reference signal based on the predicted convergence voltage value, comparison circuitry that compares the voltage value of the analog signal with the ramp wave, measurement circuitry that measures a time period from a generation of the reference signal to a time before the voltage value of the analog signal intersects with the ramp wave of the reference signal, and addition circuitry that derives a convergence voltage value of the analog signal by adding a voltage value corresponding to the measured time period and a voltage value based on the predicted convergence voltage value.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: May 17, 2022
    Assignee: Sony Semiconductor Solution Corporation
    Inventor: Yuto Nonoshita
  • Publication number: 20210389465
    Abstract: An electronic device having an array of illumination units, and multiple drivers, each driver being configured to drive a sub-array of the illumination units.
    Type: Application
    Filed: October 25, 2019
    Publication date: December 16, 2021
    Applicant: Sony Semiconductor Solution Corporation
    Inventor: Victor Belokonskiy
  • Patent number: 10347671
    Abstract: An image sensor includes a plurality of unit pixels formed as a semiconductor chip, each of which has a photoelectric converting unit, a charge holding unit that holds charges stored in the photoelectric converting unit, a charge-voltage converting unit that converts a charge transferred from the charge holding unit to a voltage, and light shielding films between which an opening is formed above the photoelectric converting unit. The plurality of unit pixels are placed in a matrix in a pixel array. The shapes of the light shielding films are varied depending on the position of the unit pixel in the pixel array.
    Type: Grant
    Filed: February 13, 2014
    Date of Patent: July 9, 2019
    Assignee: Sony Semiconductor Solution Corporation
    Inventor: Tomohiro Ohkubo
  • Publication number: 20190158199
    Abstract: The present technology relates to a transmitting apparatus, a transmitting method, a receiving apparatus, and a receiving method that facilitate tuning setting. A transmitting apparatus generates and transmits transmission data including an index in data of a physical layer, the index being associated with predetermined processing-related information in a relation table in which processing-related information related to setting processing of tuning on a receiving side is registered in association with an index representing a region to be subjected to the setting processing corresponding to the processing-related information and provided as being included in data of an upper layer higher than the physical layer. A receiving apparatus acquires the relation table, while receiving the transmission data, and acquires the index included in the data of the physical layer from the transmission data.
    Type: Application
    Filed: June 16, 2017
    Publication date: May 23, 2019
    Applicant: SONY SEMICONDUCTOR SOLUTION CORPORATION
    Inventors: Kazuyuki TAKAHASHI, Lachlan Bruce MICHAEL
  • Patent number: 10163962
    Abstract: The present technology relates to a solid-state imaging apparatus, a manufacturing method therefor, and an electronic apparatus by which fine pixel signals can be suitably generated. A charge accumulation section that is formed on a first semiconductor substrate and accumulates photoelectrically converted charges, a charge-retaining section that is formed on a second semiconductor substrate and retains charges accumulated in the charge accumulation section, and a transfer transistor that is formed on the first semiconductor substrate and the second semiconductor substrate and transfers charges accumulated in the charge accumulation section to the charge-retaining section are provided. A bonding interface between the first semiconductor substrate and the second semiconductor substrate is formed in a channel of the transfer transistor.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: December 25, 2018
    Assignee: Sony Semiconductor Solution Corporation
    Inventor: Hiroshi Tayanaka
  • Patent number: 9531972
    Abstract: a CMOS image sensor including a pixel array unit having pixels arranged in even-numbered pixel rows and odd-numbered pixel rows. A reading operation performed such that a first signal of a first pixel group is read in a first accumulation time, and a second signal of a second pixel group is read in a second accumulation time shorter than said first accumulation time.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: December 27, 2016
    Assignee: Sony Semiconductor Solution Corporation
    Inventor: Keiji Mabuchi