Abstract: A chrominance to luminance gain and delay measurement display shows gain and delay inequalities due to differences between luminance and chrominance chanels of a video device as a point within a rectangular coordinate display system with respect to established tolerance limits. An appropriate test signal having bar and modulated pulse waveforms is selected from digitized video data stored in a field store acquisition memory. Luminance and chrominance arrays are derived from the modulated pulse waveform. The center points for each array are identified and displayed as a time difference between the center points along one axis of the display and as an amplitude ratio (chrominance/luminance) between the center points along an orthogonal axis of the display. The display includes a tolerance window so that an operator can readily observe whether the chrominance to luminance gain and delay is within established tolerances.

Abstract: A timing pulse jitter measurement display suitable for observing large jitter deviations, such as those caused by head changes between fields of video data in a video tape or cassette recorder (VTR or VCR), selects a range of data samples about each timing pulse for processing. The data samples are acquired using a stable, jitter free, precision clock. Residual signals, such as residual subcarrier in a video signal, are removed from the selected data samples and a precise timing point is determined for each timing interval with respect to a stable reference point. The deviations of the timing points from a baseline, derived from the precision clock and representing the stable reference points occurring at a nominal timing interval, are displayed, and means provided for determining peak to peak jitter along any portion of the acquired set of displayed data samples. Averaging also is provided between acquisition sets of data samples to reduce noise and highlight phase errors due to some repetitive influence.

Abstract: An electronic device measurement apparatus measures a characteristic of an electronic device under test (DUT) by applying a sine-wave voltage to the DUT, detecting the voltage across the DUT as well as the current flowing through the DUT and displaying a characteristic curve in accordance with the detected voltage and current. The sine-wave voltage is generated in phase with an AC line voltage but the amplitude thereof is independent of the line voltage, and consequently the circuits in the measurement apparatus are not affected by variations in phase and amplitude in the line. Moreover, the generated sine-wave voltage is symmetrical, whereby display distortion is substantially eliminated. A voltage limiter and a current limiter are provided for limiting the voltage and current to be applied to the DUT to values determined by a display window, for protecting a current detecting resistor and a voltage divider connected to the DUT.