Abstract: A Soft, Prioritised Early Packet Discard System is provided, which is suitable for satellite onboard switching and very-high-speed terrestrial switching applications. The system counts the number of newly arriving packets, calculates and regularly updates an average queue size, which is used in setting a packet-count threshold via a descending staircase function. When the number of newly arriving packets reaches the packet-count threshold and when the average queue size reaches or exceeds the congestion threshold; a packet is discarded and the packet-counter is reset to zero. The counting of packets is halted while the average queue size remains below the congestion threshold. The regular dropping of packets allows simplified hardware implementations. In calculating the average queue size, a progressively higher exponential queue-length averaging parameter is used for higher instantaneous queue length, to provide faster reaction to congestion situations.

Abstract: A method and sytem for achieving carrier frequency synchronization in a high speed receiver. A feedback loop in a carrier recovery system is operated at a down-sampled rate until carrier lock is detected. The output of a phase accumulator, operating at the down-sampled rate, is then extrapolated to provide extrapolated outputs to provide outputs at the original symbol rate. Addresses for a look-up table are then generated from the combined phase accumulator outputs and extrapolated outputs, such that the frequency and phase compensation offsets provided to a phase derotator and slicer are at the original symbol rate. The total pipeline delay as seen by the carrier recovery system is thus reduced. This in turn allows for more efficient correction of residual carrier frequency errors present in a complex baseband signal.

Abstract: A data encoder for encoding a codeword having a plurality of symbols for transmission through a data channel comprises a turbo encoder which has an interleaver, first and second RSC encoders, a puncturer and a mapper. The interleaver receives the codeword and provides an interleaved codeword. The first RSC encoder is for receiving the codeword and providing first parity bits in accordance with the codeword. The second RSC encoder is for receiving the interleaved codeword from the interleaver and providing second parity bits in accordance with the interleaved codeword. The puncturer is for receiving the codeword, the first parity bits and the second parity bits, and for puncturing at least the first and second parity bits in accordance with a pattern of a desired code rate. The mapper is for receiving the punctured parity bits, and for providing signal sets in accordance with the desired code rate.