Abstract: A method of passivating semiconductor devices using existing tools of junction isolation and phosphosilicate glass (PSG)/borosilicate glass (BSG) etch via room temperature wet chemical growth (RTWCG) processes is provided. Back side processing of the semiconductor device achieves passivation and junction isolation in a single step, while front side processing achieves passivation, PSG/BSG etch, anti-reflection coating and potential induced degradation (PID) mitigation simultaneously. A modified solar cell fabrication method is then provided by integrating the passivation formation method into conventional solar cell manufacturing systems. The resulting solar cells comprise a semiconductor substrate having a front surface and a back surface. The front surface is coated with a SiOx layer less than 50 nm thick, over which a SiNx layer is deposited. On the back surface, another SiOx layer is coated. Experimental data shows high efficiency and mitigated PID of the solar cells.

Abstract: A method of passivating semiconductor devices using existing tools of junction isolation and phosphosilicate glass (PSG)/borosilicate glass (BSG) etch via room temperature wet chemical growth (RTWCG) processes is provided. Back side processing of the semiconductor device achieves passivation and junction isolation in a single step, while front side processing achieves passivation, PSG/BSG etch, anti-reflection coating and potential induced degradation (PID) mitigation simultaneously. A modified solar cell fabrication method is then provided by integrating the passivation formation method into conventional solar cell manufacturing systems. The resulting solar cells comprise a semiconductor substrate having a front surface and a back surface. The front surface is coated with a SiOx layer less than 50 nm thick, over which a SiNx layer is deposited. On the back surface, another SiOx layer is coated. Experimental data shows high efficiency and mitigated PID of the solar cells.