Abstract: A method of fabricating a MOSFET transistor and resulting structure having a drain-gate feedback capacitance shield formed in a recess between a gate electrode and the drain region. The shield does not overlap the gate and thereby minimizes effect on the input capacitance of the transistor. The process does not require complex or costly processing since one additional non-critical mask is required with selective etch used to create the recess.

Abstract: The breakdown voltage of a semiconductor device, such as a transistor fabricated in a device region in and abutting the surface of a semiconductor body with a field oxide surrounding the device region, is improved by etching the field oxide abutting the device region to reduce the thickness thereof to about 0.6-1.4 .mu.m and then forming a field plate in the recessed field oxide which is capacitively coupled to the underlying semiconductor body. The field plate can be floating, connected to a voltage potential, or connected to the semiconductor device.

Abstract: A power semiconductor device package in which a semiconductor chip is mounted on a ceramic platform and sealed thereon by a lid. The platform has opposing end portions which receive fasteners for directly fastening the platform and semiconductor device to a heat sink without the requirement of a separate mounting clamp. In one embodiment, metal films are provided on a surface of the platform adjacent to recesses for receiving the fasteners. The metal films function to distribute the stress of the fasteners over the surface of the end portions thereby minimizing the possibility of fracture of the ceramic platform.

Abstract: A MOS transistor including a gate electrode on a gate oxide over a channel region between a source region and a drain region also includes a shield electrode at least partially on the gate oxide adjacent to, self-aligned with, and at least partially coplanar with the gate electrode and between the gate electrode and drain region. Placing the shield electrode on the gate oxide improves the gate-drain shielding, reduces the gate-drain capacitance, Cgd, and reduces hot electron related reliability hazard.

Abstract: Increased gain and improved stability are realized in using resistive emitter ballasting by including integrated capacitive elements in parallel with the resistive elements in the emitter circuit. A feature of the invention is an integrated capacitor structure having a small surface area to minimize parasitic capacitance, whereby resistor and capacitor surface areas of 100 square micrometers or less are obtained. Another feature of the invention is the use of a high dielectric material in realizing a resistor-capacitor impedance zero at a frequency much lower than the operating frequency of the transistor. For an operating frequency of 2 GHz and resistor values of 50-250 ohms, capacitance required is 3 pF or greater. Another feature of the invention is a method of fabricating the integrated resistive-capacitive element in either a low temperature process or a high temperature process which minimizes capacitor leakage when using a thin high dielectric insulative material between capacitor plates.

Abstract: An integral semiconductor package and mounting structure in which a lid for sealing a semiconductor chip on a platform includes flanges extending beyond the platform with the flanges having holes for receiving screws for mounting the package to a heat sink. The flanges are flexed into engagement with a heat sink thereby maintaining the package in yieldable pressure engagement with the heat sink.

Abstract: An IGFET device (lateral DMOS transistor) with reduced cell dimensions which is especially suitable for RF and microwave applications, includes a semiconductor substrate having an epitaxial layer with a device formed in a surface of the epitaxial layer. A sinker contact is provided from the surface to the epitaxial layer to the substrate for use in grounding the source region to the grounded substrate. The sinker contact is aligned with the source region and spaced from the width of the channel region whereby lateral diffusion in forming the sinker contact does not adversely affect the pitch of the cell structure. The reduced pitch increases output power and reduces parasitic capacitance whereby the device is well-suited for low side switches and as an RF/microwave power transistor.

Abstract: A ceramic package and mounting structure which requires less surface area on a heat sink and improves heat transfer to the heat sink. Each ceramic package has a top side and a bottom side with the bottom side being flat and smooth. The bottom side can be a polished ceramic, or metal layer which is plated or brazed to the bottom side. The mounting structure includes a clamp and a spring in pressure engagement with the top side of the package for maintaining the package in pressure engagement with the heat sink.

Abstract: A ceramic package and mounting structure which requires less surface area on a heat sink and improves heat transfer to the heat sink. Each ceramic package has a top side and a bottom side with the bottom side being flat and smooth. The bottom side can be a polished ceramic, or a metal layer which is plated or brazed to the bottom side. The mounting structure includes a clamp in pressure engagement with the top side of the package and maintains the package pressure engagement with the heat sink.

Abstract: Increased gain and improved stability are realized in using resistive emitter ballasting by including integrated capacitive elements in parallel with the resistive elements in the emitter circuit. A feature of the invention is an integrated capacitor structure having a small surface area to minimize parasitic capacitance, whereby resistor and capacitor surface areas of 100 square micrometers or less are obtained. Another feature of the invention is the use of a high dielectric material in realizing a resistor-capacitor impedance zero at a frequency much lower than the operating frequency of the transistor. For an operating frequency of 2 GHz and resistor values of 50-250 ohms, capacitance required is 3 pF or greater. Another feature of the invention is a method of fabricating the integrated resistive-capacitive element in either a low temperature process or a high temperature process which minimizes capacitor leakage when using a thin high dielectric insulative material between capacitor plates.

Abstract: An IGFET device (lateral DMOS transistor) with reduced cell dimensions which is especially suitable for RF and microwave applications, includes a semiconductor substrate having an epitaxial layer with a device formed in a surface of the epitaxial layer. A sinker contact is provided from the surface to the epitaxial layer to the substrate for use in grounding the source region to the grounded substrate. The sinker contact is aligned with the source region and spaced from the width of the channel region whereby lateral diffusion in forming the sinker contact does not adversely affect the pitch of the cell structure. The reduced pitch increases output power and reduces parasitic capacitance whereby the device is well-suited for low side switches and as an RF/microwave power transistor.

Abstract: To reduce the size and power dissipation of a feed-forward amplifier, two identical high power amplifiers in a quadrature combined configuration function both as the main amplifier and as the error amplifier. The feed-forward amplifier has two control loops to increase amplifier linearity and reduce intermodulation distortion. A first loop is provided to subtract a properly scaled and delayed sample of the amplifier input spectrum from a scaled and phase shifted sample of its output spectrum which contains intermodulation distortion. The result of this subtraction (if the samples are maintained at the same amplitude and 180 degrees out of phase) is a signal rich in the intermodulation products of the amplifier.

Abstract: An RF power amplifier utilizes predistortion to improve linearity of the amplifier. RF carrier signals from an input terminal are coupled to a power amplifier through a first amplitude and phase adjustor serially connected with a predistortion amplifier having signal distortion characteristics of the power amplifier. A first control loop includes a subtractor for receiving RF carrier signals from the input terminal and signals from the predistortion amplifier and producing a predistortion signal for applying to the power amplifier through a path including a second amplitude and phase adjustor and an error amplifier. A first loop control unit receives the RF carrier signals from the input terminal and the distortion signal and produces control signals for the first amplitude and phase adjustor for minimizing RF carrier signals in the predistortion signal.

Abstract: A first loop is provided to subtract a properly scaled and delayed sample of the amplifier's input spectrum from a scaled and phase shifted sample of its output spectrum which contains intermodulation distortion. The result of this subtraction (if the samples are maintained at the same amplitude and 180 degrees out of phase) is a signal rich in the intermodulation products of the amplifier. A feature of the invention is a differential phase-amplifier comparator which compares the signals prior to and after amplification and generates control signals for amplitude and phase trimmers for the signal prior to the amplifier and thus maintains the required equal amplitude and 180 degree phase relationship required for carrier cancellation. The signals before amplification and after amplification are subtracted leaving substantially the intermodulation products resulting from amplification.

Abstract: Operating characteristics of an electronics device in which alternating currents flow are improved by reducing positive electromagnetic coupling between currents. This is accomplished by altering the direction of a current flow to obtain negative coupling through current flow in the same direction, or by minimizing electromagnetic coupling through perpendicular current flow, or by increasing the spacing between two electromagnetically coupled currents. In a bipolar transistor structure a feed structure for emitter and base current includes wire bonding pads aligned so that emitter current and base current flow to wire bonding pads perpendicular to the direction of collector current flow and with adjacent emitter currents and base currents flowing in the same direction. Each feed structure includes a plurality of interdigitated fingers for contacting emitter and base regions, all emitter and base currents in said interdigitated fingers of all feed structures flowing in the same direction as the collector.

Abstract: An improved Nuclear Magnetic Resonance (NMR)/Magnetic Resonance Imaging (MRI) Pulse Amplifier uses fast acting Radio Frequency (RF) switches with a fixed or programmable attenuator to achieve fast blanking speed, low blanked noise and a low power mode, previously unavailable with existing amplifiers.

Abstract: An RF power transistor is mounted on a ceramic substrate with a plurality of input leads extending from one edge of the substrate, a plurality of output leads extending from an opposite edge of the substrate, a plurality of input ground leads with ground leads positioned between adjacent input leads, and a plurality of output ground leads with ground lead positioned between adjacent output leads. All ground leads are ohmically connected with the current paths between adjacent ground leads reduced in length.

Abstract: The feeds to the emitter, base, and collector of an RF power transistor (source, drain, gate feeds of an RF FET) are configured so that negative mutual coupling therebetween is enhanced and positive mutual coupling therebetween is reduced. The emitter and base feeds include elongated portions which are generally parallel to each other with bonding pads provided on the elongated portions so that emitter and base currents flow in the same direction in the elongated portions and in the same direction as collector currents below. Interdigitated contact fingers extend from the elongated portions and contact the emitter region and the base region, respectively. When positive coupling of collector current and emitter current to the controlling base current is reduced or eliminated, the major thermal imbalance problem of operating RF transistors is also reduced or eliminated. Performance, linearity, efficiency, gain, and ruggedness are all enhanced in devices designed to utilize this invention.

Abstract: An RF power FET amplifier is designed using parasitic resonant matching to reduce low intermodulation distortion. An input inductor is connected in parallel with the capacitance of the common-source input capacitance, an output inductor is connected in parallel with the common-source output capacitance. Feedback provided by the common-source capacitance between gate and drain is utilized to improve linearization and stability. The field effect transistor is designed so that the feedback signal resulting from the feedback capacitance is 180.degree. with respect to the forward gain.

Abstract: A planar balun including first and second spaced parallel elongated conductors on one surface of a ceramic, plastic, polymer, synthetic fiber or a composite substrate and a third elongated conductor on a second surface of the substrate opposite from the first and second conductors. The spacing from an outer edge of each of the first and second conductors to an outer edge of the third conductor being greater than the thickness of the ceramic substrate, and the spacing between the two parallel elongated conductors being greater than ##EQU1## The substrate is mounted on a metallic support plate which provides a ground plane spaced from the third conductor by a distance t2 in an atmosphere comprising air with the distance t2 being greater than ##EQU2## An input of the balun is at one end of the first and second conductors and an output of the balun is at the other end of the first and second conductors.