Abstract: A magnetoresistive random-access memory (MRAM) device is disclosed. The device described herein has a thermal stability enhancement layer over the free layer of a magnetic tunnel junction. The thermal stability enhancement layer improves the thermal stability of the free layer, increases the magnetic moment of the free layer, while also not causing the magnetic direction of the free layer to become in plan. The thermal stability enhancement layer can be include a layer of CoFeB ferromagnetic material.

Abstract: A method for manufacturing a magnetic random access memory chip having magnetic memory elements with different performance characteristics formed on the same chip. The magnetic memory elements can be magnetic random access memory elements. The memory chip can have a first set of magnetic random access chips having a first set of physical and performance characteristics formed in a first area of the sensor and a second set of magnetic random access chips having a second set of performance characteristics formed in a second area of the chip. For example, the first set of magnetic random access memory elements can have performance characteristics that match or exceed those of a non-volatile memory, whereas the second set of magnetic random access memory elements can have performance characteristic that match or exceed those of a static random access memory element.

Abstract: Methods and structures useful for magnetoresistive random-access memory (MRAM) are disclosed. The MRAM device has a magnetic tunnel junction stack having a significantly improved performance of the free layer in the magnetic tunnel junction structure. The MRAM device also utilizes a three-terminal structure, thereby allowing efficient writing of the bit without a concomitant increase in read disturb.

Abstract: A memory device for storing data is disclosed. The memory device comprises a memory bank comprising a plurality of addressable memory cells configured in a plurality of segments wherein each segment contains N rows per segment, wherein the memory bank comprises a total of B entries, and wherein the memory cells are characterized by having a prescribed word error rate, E. Further, the device comprises a pipeline comprising M pipestages and configured to process write operations of a plurality of data words addressed to a given segment of the memory bank. The device also comprises a cache memory comprising Y number of entries, the cache memory associated with the given segment of the memory bank, and wherein the Y number of entries is based on the M, the N and the prescribed word error rate, E, to prevent overflow of the cache memory.

Abstract: A memory pipeline for performing a write operation in a memory device is disclosed. The memory pipeline comprises an input register operable to receive a first data word and an associated address to be written into a memory bank. The pipeline also comprises a first write register of a first pipe-stage coupled to the input register and operable to receive the first data word and the associated address from the input register, wherein the first write register is further operable to perform a first attempt at writing said data word into the memory bank. Further, the pipeline comprises a second write register of the second pipe-stage coupled to the first write register and operable to receive the first data word and the associated address from the first write register, wherein the second write register is further operable to perform a second attempt at writing the first data word into the memory bank at the location corresponding to the associated address.

Abstract: A Magnetic Random Access Memory (MRAM) structure having a thermally conductive, dielectric cladding material that contacts an outer side of a magnetic memory element. The magnetic memory element can be a magnetic tunnel junction element formed as a cylindrical pillar that extends between first and second electrically conductive lead layers. The cylinder of the magnetic memory element can have an outer periphery, and the cladding material can be formed to contact the entire periphery. In addition, a heat sink structure formed of a dielectric material having a high specific heat capacity can be formed to contact an outer periphery of the cladding material. The cladding material and heat sink structure efficiently conduct heat away from the sides of the memory element to prevent the temperature of the memory element to rise to unsafe levels. This advantageously assists in maintaining a high reliability and long life of the MRAM system.

Abstract: In one embodiment, an apparatus includes lower electrodes positioned below a surface of a substrate, the substrate including crystalline Si, a plurality of strap regions positioned above the lower electrodes and below sets of pillars of Si, the pillars rising above the substrate, the sets of pillars being aligned in a first direction along a plane perpendicular to a film thickness direction, and the strap regions extending above a surface of the substrate, silicide junctions positioned between each of the strap regions and a corresponding lower electrode positioned therebelow, upper electrodes positioned above each of the pillars, gate dielectric layers positioned on sides of the pillars to a height greater than a lower edge of the upper electrodes, and gate layers positioned on sides of the gate dielectric layers in a second direction along the plane and perpendicular to the first direction that transverse a plurality of sets of pillars.

Abstract: A magnetoresistive random-access memory (MRAM) device is disclosed. The device described herein has a thermal stability enhancement layer over the free layer of a magnetic tunnel junction. The thermal stability enhancement layer improves the thermal stability of the free layer, increases the magnetic moment of the free layer, while also not causing the magnetic direction of the free layer to become in plan. The thermal stability enhancement layer can be comprised of a layer of CoFeB ferromagnetic material.

Abstract: An advantageous write verify operation for bipolar memory devices is disclosed. The verify operation is performed under the same bias conditions as the write operation. Thus, the verify operation reduces disturb conditions caused when verify operation is performed in opposite bias to write operation. The advantageous write verify operation may be performed with control logic on source and bit lines. In another embodiment, the advantageous write operation is performed with mux coupled to control logic. The mux determines whether verify (0) or verify (1) operation should be performed based on data in a program latch. Moreover, the mux may select bias conditions for read operations based on a register bit. Trim circuits optionally provide guard banding and modify reference voltages for verify operations performed in opposite polarity to normal read operation.

Abstract: A magnetoresistive random-access memory (MRAM) device is disclosed. The device described herein has a spin current injection capping layer between the free layer of a magnetic tunnel junction and the orthogonal polarizer layer. The spin current injection capping layer maximizes the spin torque through very efficient spin current injection from the polarizer. The spin current injection capping layer can be comprised of a layer of MgO and a layer of a ferromagnetic material.

Abstract: A magnetoresistive random-access memory (MRAM) is disclosed. The MRAM device includes a perpendicular magnetic tunnel junction device having a reference layer, a free layer, and a precessional spin current magnetic layer. The precessional spin current magnetic layer has a central axis that is offset from a central axis of the free layer. The device is designed to provide control over the injection of stray fields and the electronic coupling between the precessional spin current magnetic layer and the free layer. Switching speed, switching current, and thermal barrier height for the device can be adjusted. The off-center design may be used to adjust the location of the stray-field injection in the free layer.

Abstract: A magnetoresistive random-access memory (MRAM) is disclosed. MRAM device has a magnetic tunnel junction stack having a significantly improved performance of the free layer in the magnetic tunnel junction structure. The MRAM device utilizes a precessional spin current (PSC) magnetic layer in conjunction with a perpendicular MTJ where the in-plane magnetization direction of the PSC magnetic layer is free to rotate.

Abstract: A nonvolatile error buffer is added to STT-MRAM memory design to reduce the error correction coding ECC required to achieve reliable operation with a non-zero Write Error Rate (“WER”). The error buffer is fully associative, storing both the address and the data of memory words which have failed to write correctly within an assigned ECC error budget. The write cycle includes a verify to determine if the word has been written correctly. The read cycle includes a search of the error buffer to determine if the address is present in the buffer.

Abstract: A magnetoresistive random-access memory (MRAM) is disclosed. The MRAM device reduces stray magnetic fields generated by magnetic layers of the stack, including a reference layer and magnetic layers of the synthetic antiferromagnetic layer, in a way that reduces their impact on the other layers of the stack, including a free layer and an optional filter layer, which may include a polarizer layer or a precessional spin current magnetic layer. The reduction in stray magnetic fields in the stack increases the electrical and retention performance of the stack by reducing switching asymmetry in the free layer. The reduction in stray magnetic fields also may improve performance of a filter layer, such as a precessional spin current magnetic layer by reducing asymmetry in the dynamic magnetic rotation of that layer.

Abstract: A magnetoresistive random-access memory (MRAM) is disclosed. MRAM device has a magnetic tunnel junction stack having a significantly improved performance of the free layer in the magnetic tunnel junction structure. The MRAM device utilizes a precessional spin current (PSC) magnetic layer in conjunction with a perpendicular MTJ where the in-plane magnetization direction of the PSC magnetic layer is free to rotate.

Abstract: A magnetoresistive random-access memory (MRAM) is disclosed. MRAM device has a magnetic tunnel junction stack having a significantly improved performance of the free layer in the magnetic tunnel junction structure. The MRAM device utilizes a precessional spin current (PSC) magnetic layer in conjunction with a perpendicular MTJ where the in-plane magnetization direction of the PSC magnetic layer is free to rotate.

Abstract: Described embodiments can be used in semiconductor manufacturing and employ materials with high and low polish rates to help determine a precise polish end point that is consistent throughout a wafer and that can cease polishing prior to damaging semiconductor elements. The height of the low polish rate material between the semiconductor elements is used as the polishing endpoint. Because the low polish rate material slows down the polishing process, it is easy to determine an end point and avoid damage to the semiconductor elements. An additional or alternative etch end point can be a thin layer of material that provides a very clear spectroscopy signal when it has been exposed, allowing the etch process to cease.

Abstract: A magnetoresistive random-access memory (MRAM) device is disclosed. The device described herein has a thermal stability enhancement layer over the free layer of a magnetic tunnel junction. The thermal stability enhancement layer improves the thermal stability of the free layer, increases the magnetic moment of the free layer, while also not causing the magnetic direction of the free layer to become in plan. The thermal stability enhancement layer can be comprised of a layer of CoFeB ferromagnetic material.

Abstract: A magnetoresistive random-access memory (MRAM) device is disclosed. The device described herein has a spin current injection capping layer between the free layer of a magnetic tunnel junction and the orthogonal polarizer layer. The spin current injection capping layer maximizes the spin torque through very efficient spin current injection from the polarizer. The spin current injection capping layer can be comprised of a layer of MgO and a layer of a ferromagnetic material.

Abstract: A magnetoresistive random-access memory (MRAM) device is disclosed. The device described herein has a spin current injection capping layer between the free layer of a magnetic tunnel junction and the orthogonal polarizer layer. The spin current injection capping layer maximizes the spin torque through very efficient spin current injection from the polarizer. The spin current injection capping layer can be comprised of a layer of MgO and a layer of a ferromagnetic material.