Abstract: In one embodiment, the present invention includes an interface assembly for a vertical probe contactor. The interface assembly comprises a base board, a mounting board, a depth adjust plate, and an interface apparatus. The depth adjust plate is between the base board and the mounting board, and the interface apparatus is mounted to the mounting board. The interface apparatus is configured to receive the vertical probe contactor through an opening in the base board and a corresponding opening in the depth adjust plate. A thickness of the depth adjust plate defines a vertical distance between a wafer side of the base board and a plurality of probe tips of the vertical probe contactor.

Abstract: In one embodiment, the present invention includes an apparatus for contacting a plurality of contact locations of a semiconductor device. The apparatus comprises a ring bottom, a ring top, and plurality of probe members. The ring bottom has a plurality of furrows orchestrated toward the plurality of contact locations. Each probe member of the plurality of probes is aligned within a corresponding furrow of the plurality of furrows in order to contact the plurality of contact locations. The ring top has a plurality of protrusions corresponding to the plurality of furrows. Each protrusion of the plurality of protrusions presses against a length of each corresponding probe member of the plurality of probe members, thereby securing each probe member of the plurality of probe members within the corresponding furrow of the plurality of furrows.

Abstract: In one embodiment, the present invention includes an interface apparatus for semiconductor testing. The interface apparatus includes a housing. The housing includes a lower housing substrate and an upper housing substrate. The lower housing substrate has a plurality of apertures arranged according to a fine pitch, and the upper housing substrate has a plurality of apertures arranged according to a coarse pitch. A plurality of wires passes through the plurality of apertures from the lower housing substrate to the upper housing substrate. Each wire has plated conductive ends emanating from opposing sides of the housing. The plurality of apertures of the lower housing substrate corresponds to the plurality of apertures of the upper housing substrate. The interface apparatus transforms a pattern having a course pitch to a pattern having a fine pitch.

Abstract: The present invention includes an interface apparatus for semiconductor testing. The interface apparatus comprises a housing substrate and two product substrates. The first product substrate has a first micro-scale conductive pattern and is situated within a first opening of the housing substrate. The second product substrate has a second micro-scale conductive pattern and is situated within a second opening of the housing substrate. The first and the second micro-scale conductive patterns are aligned to a conductive semiconductor wafer pattern using a continuous translucent media having targets corresponding to the conductive semiconductor wafer pattern.

Abstract: In one embodiment, the present invention includes a lighting system. The lighting system comprises a light fixture. The light fixture includes a plurality of light emitting diode (LED) strings and a housing. The plurality of LED strings are electrically coupled in a low voltage configuration. The housing has the plurality of LED strings disposed in the direction of a longitudinal axis of the housing and includes a first and second member. The first member protrudes from a first end of the housing and has a first set of conductive elements electrically coupled across the plurality of LED strings. The second member protrudes from a second end of the housing and has a second set of conductive elements electrically coupled across the plurality of LED strings. The first and second members are complimentary to provide mechanical and electrical coupling between the light fixture and other fixtures without external wiring.

Abstract: In one embodiment, the present invention includes an apparatus for contacting a plurality of contact locations of a semiconductor device. The apparatus includes a housing, a support member, a plurality of probe members, and an adhesive substance. The housing has a plurality of apertures that provides a low leakage pathway for high frequency signals to reach the semiconductor device through the plurality of probe members. The plurality of probe members are aligned on the support member and the adhesive substance secures the plurality of probe members to the supporting member. The housing, supporting member, and adhesive substance match in thermal expansion to reduce the error in alignment between the plurality of contact locations and the plurality of probe members over a temperature variance.