Abstract: Highly conducting polyaniline is produced in situ in a tantalum capacitor by subjecting an excess of monomeric aniline to a solution having a low concentration of ammonium persulfate reagent. The monomer is oxidized by the reagent in preference to the polymer, so that the presence of excess monomer protects the polymer as it is produced against further oxidation to a less conductive species.

Abstract: A plastic film having a resin coating is used in mechanically securing the cathode of a solid electrolyte capacitor to a paddle of a leadframe while electrically insulating the cathode from the paddle.

Abstract: A solid electrolyte capacitor in a block of electrically insulative resin is provided with two electrodes connected by respective connecting tangs to output leads (+, -) and to a fuze test lead; one connecting tang (6) is formed by a first section (6B) fixed to one of the electrodes and projecting out of the resin block to form the fuze test lead, and a second section (6A) projecting out of the resin block to form a conventional terminal; an elongate strip (10) forms the fuze in one piece with the sections (6A,6B) so as to provide the only electrical connection between the sections; the fuze is coated with a supporting mass of thermally insulative resin extending between the two sections and embedded in the resin block.

Abstract: A pocket within the molded casing of a solid electrolyte capacitor is of greater volume than a fuze passing through the pocket, thereby ensuring that the fuze will not reestablish its conductive path after being blown. The pocket is established between layers of polyester tape that insulate the cathode of the capacitor from its leadframe and protect the fuze from the molding material.

Abstract: A self-healing metallized film capacitor has a dielectric sheet metallized with a metal or alloy so chosen to provide the desired sheet resistivity for a given metallization thickness. The invention applies to any metallized film capacitor in which electrode metallization thickness and clearability are important considerations.

Abstract: A standard tinned nickel-iron alloy lead frame has a plurality of pairs of extending tab portion positioned in a straight row. A long straight piece of an exothermically alloyable fuse wire, with a core of aluminum coaxially clad with palladium in approximately equal volumes, is held in contact with the plurality of pairs of lead frame tabs. Heat is applied to the fuse strand at two points; namely, on one and the other sides of each pair of tabs initiating progressive alloying in two directions from each heated point. When the progressive alloying and melting of the fuse strand reaches a tab, the tab is heated and heat sinks the fuse strand to stop the progressive alloying and melting. There is simultaneously formed a metallurgical bond between the ends of each remaining elemental fuse strand, respectively, and each of the pair of tabs that are bridged by that remaining elemental strand.

Abstract: A phthalate electrolyte containing benzil provides aluminum electrolytic capacitors having low equivalent series resistance and low rates of change in equivalent series resistance with time on voltage.

Abstract: The manufacture of an integrated circuit including an isolated vertical PNP, an isolated vertical NPN and isolated CMOS transistors is described. The PNP transistor has a shallow densely doped emitter made simultaneously with the source and drain of the PMOS transistor. The PNP base is made simultaneously with lightly doped portions of the LDD source and drain of the NMOS transistor. The PNP collector is made simultaneously with the P-well in which the NMOS transistor is formed. A P-buried layer in the isolated vertical PNP transistor provides a low collector resistance and is formed simultaneously with the P-buried layer of the NMOS transistor that extends the P-well there and better isolates the NMOS transistor from the substrate. And the N-buried layer providing superior isolation of the PNP with respect to the substrate is formed simultaneously with the N-buried layer of the vertical NPN transistor. All four of these transistors provide and are well suited for use in analog signal handling circuits.

Abstract: A stereo FM radio transmission system with FMX transmission and reception capability includes a transmitter that transmits a pilot-coherent FMX-tone indicator signal at a frequency of an exact integer submultiple of the pilot frequency. The system also includes a receiver for dividing the frequency of the received pilot signal by various submultiples, nearly equal to the exact submultiple, toward quickly finding a match in phase of the received tone and the received pilot and finally dividing the pilot by the exact submultiple to establish an operational lock mode of the receiver tone detector to keep-on an FMX-indicator lamp, to change the receiver decoder to an FMX-reception operating mode and to stand by to quickly recapture the pilot and FMX-tone in the event of multipath or other interfering signals.

Abstract: A solid electrolytic capacitor embedded in an electrically insulating resin block has a capacitor body fitted with two electrodes which are connected by two connecting lugs, those of the output terminals (+, -) and a fuze test. One of the connecting lugs is formed of a first section attached to one of electrodes of the capacitor body and leading outside the resin block to form the fuze test terminal, and of a second section electrically insulated with respect to first section and the capacitor body and leading outside the resin block to form a normal operating terminal. The fuze element alone establishes an electric link between the first and second sections while being surrounded by the supporting mass of thermally insulating resin reaching from one of the sections to the other, while itself being embedded in the resin.

Abstract: An aluminum electrolytic capacitor is housed in an aluminum can having one open end. A standard glass-to-metal seal having an outer tantalum ring is seated snugly within the mouth of the can. With the edge of the tantalum ring positioned flush with, or slightly below, the lip of the aluminum can, the beam of a pulsing infra red laser is directed at the interface between the tantalum ring of the seal and the aluminum lip of the can causing the lip of the can to melt, to flow over and to form a continuous annular Al-Ta weld with the tantalum ring and to hermetically seal the ring to the can continuously and completely at a peripheral edge of the tantalum ring.

Abstract: A wound electrolytic capacitance section is housing within a metal can having a plurality of circumferential indentations or ribs. The uppermost rib provides a seat for the capacitor cover. The lowermost rib determines the depth to which the section extends into the can and provides bottom support for the section. At least one intermediate rib provides lateral support for the section and prevents its lateral movement.

Abstract: A Hall sensor has at least one Hall element connected to the input of a differential high pass filter which includes a series branch circuit made up of two outer resistors and a central capacitor connected between the two resistors, a first summing circuit with inputs connected across the capacitor plus one of the branch resistors, a second summing circuit connected across the capacitor plus the other of the branch resistors, and a subtraction circuit having the input connected to the outputs of said first and second summing circuits. The subtraction circuit may be a differential amplifier or a differential comparator such as a differential Schmitt trigger circuit. This sensor is particularly advantageous in an electrically noisy environment, for example in use as a combustion-engine-vehicle gear tooth counting sensor, where the high common mode rejection feature of this Hall sensor reduces the chances for false counting.

Abstract: A Hall elements and magnet assembly for use as a proximity detector includes a magnet, a pole piece mounted to one pole end of the magnet and an integrated circuit having two side-by-side Hall elements, an amplifier, interconnecting wiring providing the difference voltage between the two Hall output voltages at the input of the amplifier, and a Schmitt trigger circuit. The integrated circuit is mounted to the pole piece at the pole end of the magnet. The pole piece is a ferromagnetic member which is thinner in the center than at the periphery for achieving a highly uniform field strength across the surface of the magnet pole end toward reducing the criticality of the position of mounting of the integrated circuit in manufacturing and for extending the range of gap dimensions between a passing ferromagnetic article and the assembly for which proper detection of the passing article can be made to occur.

Abstract: A method for making multilayer ceramic capacitors (MLC) has two phases, namely a first test phase and a second manufacturing phase. A test MLC capacitor with buried overlapping electrodes is made and the capacitance of that test capacitor is measured. In the subsequent manufacturing phase the same process is used to make the same capacitor except adding to it at least one pair of coplanar electrodes whereby the small capacitance between each pair of coplanar electrodes is parallel connected with the base capacitor to bring the total capacitance up close to a target value. This method is particularly valuable for making close tolerance capacitors having only a few conventional overlapping electrodes, because each pair of coplanar capacitance-adjusting electrodes has a relatively small, stable, predictable incremental capacitance that is insensitive to changes in registration between successive electrodes.

Abstract: The method includes forming in one surface of an N+ silicon wafer a matrix of uniformly deep V-shaped grooves, growing one SiO.sub.2 over the one surface and the walls of the grooves, forming over the opposite wafer surface a thick self-supporting polycrystalline layer, progressively removing portions of the original silicon wafer until the bottoms of the grooves are detected to leave separate patches of the original N+ silicon wafer material and then growing a thin (e.g. 6 microns) P-doped layer of epitaxial silicon on the exposed N+ silicon layer patch portions now isolated and defined by the grooves. A figure-eight pattern of trenches is formed in each silicon island completely through the P epitaxial layer and each of the underlying N+ buried patches but stopped at the SiO.sub.2 layer. An N+ plug is formed through the epitaxial layer to each N+ patch.

Abstract: The lead-frame in an integrated circuit package, a dual-inline-package (DIP), has a plurality of leads of which four are extensions of a down-set die-attach pad. A dog-leg finger lines in the plane of the leads and is an extension of a peripheral portion of the die-attach pad. The dog-leg finger has first and second parts that are at right angles to each other so as to lock a distal port of it in the body of encapsulating resin. An integrated circuit die having at least one power transistor is grounded electrically via a terminal and wire bonded to the distal part of the dog-leg finger. This ground circuit parallels and is redundant to a ground circuit through the die via the conductive resin that attaches the bottom of the die to the die-attach pad, the later circuit having a relatively high electrical resistance. The four leads that are extensions of the die-attach pad serve both to remove heat from the die and to provide an electrical ground connection.

Abstract: A silicon integrated circuit includes a vertical power DMOS transistor and a vertical NPN transistor in separate epitaxial pockets by a method including simultaneously forming a plurality of D-well regions in the DMOS transistor and the base region in the NPN transistor, and including simultaneously forming the elemental source regions and the emitter region. N-type buried layers are provided simultaneously in the DMOS and the NPN transistors, respectively. Also formed simultaneously are two N+ plugs connecting the two buried layers, respectively, to the epitaxial surface of the integrated circuit die. None of these economically attractive simultaneous steps requires deviation in either device from optimum geometries. Also disclosed are compatible and integrated steps for forming small signal CMOS transistors. This method also includes a full self-alignment of gate, source and channel regions in the DMOS transistor as well as in the CMOS transistors.

Abstract: An electrolytic capacitor employs an electrolyte having amic acid salts prepared in situ in the electrolyte by reacting a cyclic anhydride with ammonia or an amine in an aprotic solvent acting as an acceptor in hydrogen bonding and thereafter adding glycol.

Abstract: Dried emulsion of precursors for ceramic additives are added to paints containing fine particle ceramic materials for use in ceramic capacitors. The precursors are converted into the desired additives in the paints during the sintering of the capacitor bodies.