Patents Assigned to ST Assembly Test Services PTE LTD
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Patent number: 7446408Abstract: A package is provided for a semiconductor device including a semiconductor device support substrate having at least one interconnect metal therein connectible to a ground and having at least one opening exposing the surface of the interconnect metal. A heat sink has elastic means integral therewith for cooperating with the opening to position and secure the heat sink to the semiconductor support substrate.Type: GrantFiled: June 16, 2003Date of Patent: November 4, 2008Assignee: ST Assembly Test Services Pte LtdInventors: Il Kwon Shim, Seng Guan Chow, Gerry Balanon
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Patent number: 6876069Abstract: A new design is provided for the design of a leadframe of a semiconductor package. A ground plane is added to the design of the leadframe, the ground frame is located between the leadframe and the die attach paddle over which the semiconductor device is mounted.Type: GrantFiled: June 16, 2003Date of Patent: April 5, 2005Assignee: ST Assembly Test Services Pte Ltd.Inventors: Jefferey D. Punzalan, Hien Boon Tan, Zheng Zheng, Jae Hak Yee, Byung Joon Han
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Patent number: 6875634Abstract: A method and assembly are provided for anchoring the heat spreader of a PBGA package to the substrate thereof as part of the PBGA package. These anchor features are provided over the surface of the substrate of the PBGA package. The anchor features align with openings created in the heat spreader stand-off, thus allowing for quick and reliable positioning and anchoring of the heat spreader over the surface of the substrate of the package.Type: GrantFiled: March 18, 2004Date of Patent: April 5, 2005Assignee: ST Assembly Test Services PTE LTDInventors: Il Kwon Shim, Hermes T. Apale, Weddie Aquien, Dario Filoteo, Virgil Ararao, Leo Merilo
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Patent number: 6841858Abstract: A leadframe design (and method of forming the leadframe design), comprising: an inner die pad structure lying in a first plane; and an outer die pad structure supported by outer tie bars and connected to the inner die pad by inner tie bars. The outer die pad structure lying in a second plane spaced apart from the inner die pad structure first plane. An outer package surrounds at least the inner die pad structure and the inner tie bars. The outer die pad structure being supported by the outer tie bars. The outer package having outer walls. Lead fingers extend through the outer package outer walls and include respective inner portions extending into the outer package proximate the inner and outer die pad structures.Type: GrantFiled: September 27, 2002Date of Patent: January 11, 2005Assignee: ST Assembly Test Services PTE Ltd.Inventors: Il Kwon Shim, Kambhampati Ramakrishna, Seng Guan Chow
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Patent number: 6834658Abstract: An apparatus is provided to clean melamine deposits from tools and components that are used to form molds around and to therewith encapsulate BGA devices. The cleaning apparatus uses a dummy BGA substrate as part of and during the cleaning procedure. This dummy BGA substrate replaces the conventionally used copper strips that shield areas of the molding tools during the cleaning cycle. The dummy copper strips require, during and as part of the melamine cleaning process, frequent cleaning, which adds considerably to the time and expense of the melamine cleaning process.Type: GrantFiled: September 6, 2002Date of Patent: December 28, 2004Assignee: St Assembly Test Services PTE Ltd.Inventor: Loreto Ycong Cantillep
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Patent number: 6828671Abstract: A new method is provided for the establishment of a low resistivity connection between a wire bonded IC chip that is mounted on a heatsink and the heatsink of the package. A copper trace connection is allocated for this purpose on the surface of the substrate layer to which the IC chip is connected. An opening is provided in the substrate layer of the package, this opening aligns with the copper trace that has been allocated for establishing a ground connection and penetrates the substrate layer down to the surface of the underlying heatsink. The opening is filled with a conductive epoxy or an equivalent low-resistivity material thereby establishing a direct electrical connection or short between the allocated copper trace and the underlying heatsink. By connecting the ground point of the IC chip to the allocated copper trace, a direct electrical low resistivity connection is made between the ground point of the IC chip and the heatsink into which the IC chip is mounted.Type: GrantFiled: December 19, 2002Date of Patent: December 7, 2004Assignee: ST Assembly Test Services PTE LTDInventors: Weddie Aquien, John Briar, Setho Sing Fee
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Patent number: 6825067Abstract: A new method is provided for the creation of a mold cap. The mold cap anchoring feature of the invention is designed and incorporated from the start of the design and fabrication of the substrate. Various design options of the mold anchor of the invention can be implemented. The mold anchor of the invention allows the mold compound to flow underneath the substrate where the mold compound will remain in place until the process of mold formation is completed. The mold compound of the package will penetrate all available cavities surrounding and being accessible from the mold anchor of the invention where the mold compound will remain in place and harden. After hardening, the mold compound surrounding the mold anchor will support the anchored area.Type: GrantFiled: December 10, 2002Date of Patent: November 30, 2004Assignee: St Assembly Test Services PTE LTDInventors: Virgil C. Ararao, Hermes T. Apale, Il Kwon Shim
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Patent number: 6818981Abstract: A PBGA package is provided. The heat spreader interfaces with the substrate with the standoff of the heat spreader. The stand-off of the heat spreader is provided with an opening, the stand-off of the heat spreader is aligned with the substrate of the PBGA package by means of a copper pad that is provided over a second surface of the substrate. A solder bump is further provided over the surface of the copper pad. Thermally conductive solder is deposited over the opening of the heat spreader and over the copper pad. If the heat spreader stand-off is aligned with contact pads, thermally conductive epoxy is deposited over the contact pads.Type: GrantFiled: January 26, 2004Date of Patent: November 16, 2004Assignee: St Assembly Test Services PTE LTDInventors: Il Kwon Shim, Hermes T. Apale, Gerry Balanon
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Patent number: 6802445Abstract: A new method is provided for the creation of high-accuracy and low-accuracy openings overlying points of electrical access over the surface of a semiconductor device supporting substrate. Openings are first created for access to the substrate followed by copper plating and then patterning of the plated layer of copper, creating the interconnect metal over the surface of the substrate. A first solder mask is coated over the surface of the substrate, this first solder mask must be provided with a first array of low-accuracy openings for electrical access there-through for the placement of contact balls. The first openings can be created using conventional film artwork since low accuracy is required for the contact ball openings, resulting in a low-cost process for the creation of the first openings. A second solder mask is next coated over the surface of the first solder mask.Type: GrantFiled: October 24, 2002Date of Patent: October 12, 2004Assignee: St Assembly Test Services Pte. Ltd.Inventors: Il Kwon Shim, Jian Jun Li, Sheila Marie Alvarez
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Publication number: 20040178503Abstract: A new method and sequence is provided for the creation of solder bumps. The design of the invention implements a torch bump, which is a solder bump comprising a base over which a solder bump is created. A first layer of dry film is laminated over a supporting surface over which first a layer of UBM has been deposited. A base for the solder bump is created in a first opening created through the first layer of dry film, the created base aligns with an underlying contact pad. A second dry film is laminated over the surface of the first dry film, a second opening is created through the second dry film that aligns with the created base of the solder bump. The opening through the second dry film is filled with solder by solder printing, the first and second layers of dry film are removed, the deposited layer of UBM is etched.Type: ApplicationFiled: March 1, 2004Publication date: September 16, 2004Applicant: ST Assembly Test Services Pte LtdInventors: Yong Gang Jin, Won Sun Shin
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Patent number: 6791346Abstract: A method and apparatus for handling small semiconductor devices in the testing of these devices. Multiple devices are mounted within a device strip carrier and are positioned in the testing position. This positioning of the device strip carriers is performed using device strip carrier alignment tools; the device strip carrier can readily be repositioned with respect to the test head/probe card for testing of multiple devices contained within the device strip carrier.Type: GrantFiled: May 8, 2002Date of Patent: September 14, 2004Assignee: St. Assembly Test Services Pte LtdInventors: Rajiv Mehta, Liop-Jin Yap, Raymundo M. Camenforte, Chee-Keong Tan
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Patent number: 6774640Abstract: A new method is provided for evaluating the alignment of inner layers of interconnect layers. A test pattern is inserted within and as part of the process of creating a saw singulated plastic ball grid array substrate. The test pattern comprises a test point of reference for each inner layer of the substrate and multiple measurement points relating to the point of reference whereby each of these multiple measurement points is indicative of an amount of clearance or misalignment with respect to that inner-layer. By measuring electrical continuity or lack thereof between the point of reference and the respective multiple measurement points relating to the point of reference and by identifying which of the multiple points is shorted to the point of reference, the mis-alignment of the inner layers of the saw singulated plastic ball grid array substrate can be determined.Type: GrantFiled: August 20, 2002Date of Patent: August 10, 2004Assignee: St Assembly Test Services Pte Ltd.Inventor: Jian-Jun Li
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Publication number: 20040134054Abstract: The present invention provides a kit and method for package-to-package conversion of a pick and place handler. An input arm assembly is provided with interchangeable vacuum leads such that package-to-package conversion only requires replacing the vacuum lead with a different size vacuum lead. An input/output shuttle plate is provided comprising a block and base plate. The block has a plurality of pocket groupings and a two or more alignment hole groupings. The base plate has two or more alignment pins. Package-to-package conversion is achieved by changing which alignment hole in each alignment hole grouping is set on the alignment pins, thereby selecting the pocket in each pocket grouping corresponding to the alignment hole used. A soak plate is provided having an array of pocket groupings, wherein each pocket grouping has the same pattern of different size/shape pockets to accommodate different packages.Type: ApplicationFiled: December 22, 2003Publication date: July 15, 2004Applicant: ST ASSEMBLY TEST SERVICES PTE LTDInventors: Kai Wah Sum, Wee Boon Tan, Liop Jin Yap
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Publication number: 20040108601Abstract: A new method is provided for the creation of a mold cap. The mold cap anchoring feature of the invention is designed and incorporated from the start of the design and fabrication of the substrate. Various design options of the mold anchor of the invention can be implemented. The mold anchor of the invention allows the mold compound to flow underneath the substrate where the mold compound will remain in place until the process of mold formation is completed. The mold compound of the package will penetrate all available cavities surrounding and being accessible from the mold anchor of the invention where the mold compound will remain in place and harden. After hardening, the mold compound surrounding the mold anchor will support the anchored area.Type: ApplicationFiled: December 10, 2002Publication date: June 10, 2004Applicant: St Assembly Test Services Pte LtdInventors: Virgil C. Ararao, Hermes T. Apale, Il Kwon Shim
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Patent number: 6740577Abstract: A torch bump is provided, which is a solder bump comprising a base over which a solder bump is created. A first layer of dry film is over a supporting surface over which first a layer of UBM has been deposited. A base for the solder bump is created in a first opening through the first layer of dry film, the base aligns with an underlying contact pad. A second dry film is over the surface of the first dry film, a second opening is created through the second dry film that aligns with the created base of the solder bump. The opening through the second dry film is filled with solder by solder printing, the first and second layers of dry film are removed, the deposited layer of UBM is etched. Reflow is applied to the deposited solder, creating the torch solder.Type: GrantFiled: May 21, 2002Date of Patent: May 25, 2004Assignee: St Assembly Test Services Pte LTDInventors: Yong Gang Jin, Won Sun Shin
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Publication number: 20040079788Abstract: A new method is provided for the creation of high-accuracy and low-accuracy openings overlying points of electrical access over the surface of a semiconductor device supporting substrate. Openings are first created for access to the substrate followed by copper plating and then patterning of the plated layer of copper, creating the interconnect metal over the surface of the substrate. A first solder mask is coated over the surface of the substrate, this first solder mask must be provided with a first array of low-accuracy openings for electrical access there-through for the placement of contact balls. The first openings can be created using conventional film artwork since low accuracy is required for the contact ball openings, resulting in a low-cost process for the creation of the first openings. A second solder mask is next coated over the surface of the first solder mask.Type: ApplicationFiled: October 24, 2002Publication date: April 29, 2004Applicant: St Assembly Test Services Pte LtdInventors: Il Kwon Shim, Jian Jun Li, Sheila Marie Alvarez
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Publication number: 20040070055Abstract: A new design is provided for the design of a leadframe of a semiconductor package. A ground plane is added to the design of the leadframe, the ground frame is located between the leadframe and the die attach paddle over which the semiconductor device is mounted.Type: ApplicationFiled: June 16, 2003Publication date: April 15, 2004Applicant: ST ASSEMBLY TEST SERVICES PTE LTDInventors: Jeffrey D. Punzalan, Hien Boon Tan, Zheng Zheng, Jae Hak Yee, Byung Joon Han
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Patent number: 6718608Abstract: A method is provided for package-to-package conversion of a pick and place handler. An input arm assembly is provided with interchangeable vacuum leads. An input/output shuttle plate is provided comprising a block and base plate. The block has a plurality of pocket groupings and a two or more alignment hole groupings. The base plate has two or more alignment pins. Package-to-package conversion is achieved by changing alignment hole groupings on the alignment pins, thereby selecting the pocket corresponding to the alignment hole used. A soak plate is provided having an array of pocket groupings, wherein each pocket grouping has the same pattern of different size/shape pockets to accommodate different packages. Package-to-package conversion is accomplished by programming an offset to the desired pocket in each pocket grouping. A test arm assembly is provided with interchangeable vacuum leads and interchangeable nest pieces.Type: GrantFiled: January 22, 2002Date of Patent: April 13, 2004Assignee: St Assembly Test Services Pte LTDInventors: Sum Kai Wah, Tan Wee Boon, Yap Liop Jin
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Publication number: 20040061202Abstract: A leadframe design (and method of forming the leadframe design), comprising: an inner die pad structure lying in a first plane; and an outer die pad structure supported by outer tie bars and connected to the inner die pad by inner tie bars. The outer die pad structure lying in a second plane spaced apart from the inner die pad structure first plane. An outer package surrounds at least the inner die pad structure and the inner tie bars. The outer die pad structure being supported by the outer tie bars. The outer package having outer walls. Lead fingers extend through the outer package outer walls and include respective inner portions extending into the outer package proximate the inner and outer die pad structures.Type: ApplicationFiled: September 27, 2002Publication date: April 1, 2004Applicant: St Assembly Test Services Pte LtdInventors: Il Kwon Shim, Kambhampati Ramakrishna, Seng Guan Chow
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Patent number: 6710438Abstract: A chip scale package assembly comprises an integrated circuit die wire bonded to a carrier for mounting to a printed circuit board. The carrier comprises top and bottom ground planes thermally and electrically bonded together by a number of grounded thermal vias. The top ground plane completely surrounds the wire bond signal connections made with the die, enhancing signal integrity. The top ground plane covers the die mounting area, providing grounding and heat spreading for the die. The thermal vias are also positioned in the mounting area, and thermally couple the die to the bottom-side ground plane. The bottom ground plane is positioned within a central area around which the signal connections from the top-side are arranged. Ground pads with attached solder balls are positioned within the bottom ground plane and conduct heat transferred from the die into a primary circuit board on which the carrier is mounted.Type: GrantFiled: February 19, 2002Date of Patent: March 23, 2004Assignees: Institute of Microelectronics, Advanced Micro Devices (s) PTE LTD, Agilent Technologies Singapore PTE LTD, Amkor Technology Inc., Delphi Automotive Systems Singapore PTE LTD, Infineon Technologies (Asia Pacific) PTE LTD, Agere Systems Singapore PTE LTD, Motorola Electronics PTE LTD, Philips Electronics Singapore PTE LTD, St Assembly Test Services PTE LTDInventors: Yong Kee Yeo, Navas O.K. Khan, Mahadevan K. Iyer