Patents Assigned to Stablcor Technology, Inc.
  • Patent number: 9408314
    Abstract: Integrated circuits and processes for manufacturing integrated circuits are described that use printed wiring board substrates having a core layer that is part of the circuit of the printed wiring board. In a number of embodiments, the core layer is constructed from a carbon composite. In several embodiments, techniques are described for increasing the integrity of core layers in designs calling for high density clearance hole drilling. One embodiment of the invention includes a core layer that includes electrically conductive material and at least one build-up wiring portion formed on an outer surface of the core layer. In addition, the build-up portion comprises at least one micro wiring layer including a circuit that is electrically connected to the electrically conductive material in the core layer via a plated through hole.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: August 2, 2016
    Assignee: Stablcor Technology Inc.
    Inventor: Kalu K. Vasoya
  • Patent number: 9332632
    Abstract: Systems and methods in accordance with embodiments of the invention implement graphene-based thermal management cores and printed wiring boards incorporating graphene-based thermal management cores. In one embodiment, a graphene-based thermal management core includes: a layer including at least one sheet of graphene; a first reinforcement layer; and a second reinforcement layer; where the layer including at least one sheet of graphene is disposed between the first reinforcement layer and the second reinforcement layer.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: May 3, 2016
    Assignee: Stablcor Technology, Inc.
    Inventors: Douglas Schneider, William E. Davis
  • Publication number: 20120241202
    Abstract: Integrated circuits and processes for manufacturing integrated circuits are described that use printed wiring board substrates having a core layer that is part of the circuit of the printed wiring board. In a number of embodiments, the core layer is constructed from a carbon composite. In several embodiments, techniques are described for increasing the integrity of core layers in designs calling for high density clearance hole drilling. One embodiment of the invention includes a core layer that includes electrically conductive material and at least one build-up wiring portion formed on an outer surface of the core layer. In addition, the build-up portion comprises at least one micro wiring layer including a circuit that is electrically connected to the electrically conductive material in the core layer via a plated through hole.
    Type: Application
    Filed: June 7, 2012
    Publication date: September 27, 2012
    Applicant: Stablcor Technology, Inc.
    Inventor: Kalu K. Vasoya
  • Patent number: 8203080
    Abstract: Integrated circuits and processes for manufacturing integrated circuits are described that use printed wiring board substrates having a core layer that is part of the circuit of the printed wiring board. In a number of embodiments, the core layer is constructed from a carbon composite. In several embodiments, techniques are described for increasing the integrity of core layers in designs calling for high density clearance hole drilling. One embodiment of the invention includes a core layer that includes electrically conductive material and at least one build-up wiring portion formed on an outer surface of the core layer. In addition, the build-up portion comprises at least one micro wiring layer including a circuit that is electrically connected to the electrically conductive material in the core layer via a plated through hole.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: June 19, 2012
    Assignee: Stablcor Technology, Inc.
    Inventor: Kalu K. Vasoya
  • Publication number: 20120097431
    Abstract: Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.
    Type: Application
    Filed: December 28, 2011
    Publication date: April 26, 2012
    Applicant: Stablcor Technology, Inc.
    Inventors: Kalu K. Vasoya, Bharat M. Mangrolia, William E. Davis, Richard A. Bohner
  • Patent number: 8097335
    Abstract: Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: January 17, 2012
    Assignee: Stablcor Technology, Inc.
    Inventors: Kalu K. Vasoya, Bharat M. Mangrolia, William E. Davis, Richard A. Bohner
  • Patent number: RE45637
    Abstract: Methods of manufacturing printed wiring boards including electrically conductive constraining cores that involve a single lamination cycle are disclosed. One example of the method of the invention includes drilling a clearance pattern in an electrically conductive constraining core, arranging the electrically conductive constraining core in a stack up that includes B-stage (semi-cured) layers of dielectric material on either side of the constraining core and additional layers of material arranged to form the at least one functional layer, performing a lamination cycle on the stack up that causes the resin in the B-stage (semi-cured) layers of dielectric to reflow and fill the clearance pattern in the electrically conductive constraining core before curing and drilling plated through holes.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: July 28, 2015
    Assignee: Stablcor Technology, Inc.
    Inventor: Kalu K. Vasoya