Patents Assigned to STATS ChipPAC Pte. Ltd.
  • Publication number: 20250149454
    Abstract: A semiconductor device has a first interconnect structure. A pre-molded bridge die is disposed over the first interconnect structure. An encapsulant is deposited over the pre-molded bridge die. A second interconnect structure is disposed over the encapsulant and pre-molded bridge die. A first semiconductor die is disposed over the second interconnect structure within a footprint of the pre-molded bridge die. A second semiconductor die is disposed over the second interconnect structure within the footprint of the pre-molded bridge die.
    Type: Application
    Filed: November 6, 2023
    Publication date: May 8, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Linda Pei Ee Chua, Kai Chong Chan, Yaojian Lin
  • Publication number: 20250140730
    Abstract: A semiconductor device has an electrical component and a first interconnect structure disposed adjacent to the electrical component. The electrical component can be a direct metal bonded semiconductor die or a flipchip semiconductor die. The first interconnect structure can be an interposer unit or a conductive pillar. A split antenna is disposed over the electrical component and first interconnect structure. The split antenna has a first antenna section and a second antenna section with an adhesive material disposed between the first antenna section and second antenna section. A second interconnect structure is formed over the electrical component and first interconnect structure. The second interconnect structure has one or more conductive layers and insulating layers. The first interconnect structure and second interconnect structure provide a conduction path between the electrical component and split antenna. An encapsulant is deposited around the electrical component and first interconnect structure.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 1, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Linda Pei Ee Chua, DanFeng Yang, Hin Hwa Goh
  • Patent number: 12288754
    Abstract: A semiconductor device has a first substrate and a first electrical component disposed over the first substrate. A first support frame is disposed over the first substrate. The first support frame has a horizontal support channel extending across the first substrate and a vertical support brace extending from the horizontal support channel to the first substrate. The first support frame can have a vertical shielding partition extending from the horizontal support channel to the first substrate. An encapsulant is deposited over the first electrical component and first substrate and around the first support frame. A second electrical component is disposed over the first electrical component. A second substrate is disposed over the first support frame. A second electrical component is disposed over the second substrate. A third substrate is disposed over the second substrate. A second support frame is disposed over the second substrate.
    Type: Grant
    Filed: November 22, 2023
    Date of Patent: April 29, 2025
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventor: GunHyuck Lee
  • Patent number: 12288753
    Abstract: A semiconductor device has a substrate. A lid is disposed over the substrate. An encapsulant is deposited over the substrate. A film mask is disposed over the encapsulant with the lid exposed from the film mask and encapsulant. A conductive layer is formed over the film mask, encapsulant, and lid. The film mask is removed after forming the conductive layer.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: April 29, 2025
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoungHee Park, KyoWang Koo, SungWon Cho
  • Patent number: 12288781
    Abstract: A semiconductor device is formed by providing a semiconductor package including a shielding layer and forming a slot in the shielding layer using a laser. The laser is turned on and exposed to the shielding layer with a center of the laser disposed over a first point of the shielding layer. The laser is moved in a loop while the laser remains on and exposed to the shielding layer. Exposure of the laser to the shielding layer is stopped when the center of the laser is disposed over a second point of the shielding layer. A distance between the first point and the second point is approximately equal to a radius of the laser.
    Type: Grant
    Filed: July 20, 2023
    Date of Patent: April 29, 2025
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, JinHee Jung
  • Publication number: 20250132291
    Abstract: A semiconductor device has a first interconnect structure. A first bridge die is disposed over the first interconnect structure. An encapsulant is deposited over the first bridge die. A second interconnect structure is formed over the first bridge die and encapsulant. A second bridge die is disposed over the second interconnect structure.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 24, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: DanFeng Yang, Yaojian Lin, Linda Pei Ee Chua, Kai Chong Chan, Jian Zuo
  • Publication number: 20250118643
    Abstract: A semiconductor device has a first substrate with a surface. A thickness of the first substrate is less than 120 micrometers. The surface undergoes a grinding operation. The surface of the first substrate is then polished to produce a polished surface. The first substrate is singulated into a plurality of semiconductor die. The semiconductor die is over an interposer. The interposer has a second substrate and a conductive via formed through the second substrate. The interposer further has a first insulating layer formed over a first surface of the second substrate, first conductive layer formed over the first surface, second insulating layer formed over a second surface of the second substrate, second conductive layer formed over the second surface, and bump formed over the second conductive layer. An underfill material is deposited around the semiconductor die. The polished surface inhibits progression of the underfill material onto the polished surface.
    Type: Application
    Filed: October 9, 2023
    Publication date: April 10, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Yi Jing Eric Chong, Marites Roque, Rowena Zarate, Linda Pei Ee Chua, Kai Chong Chan
  • Publication number: 20250112078
    Abstract: A semiconductor manufacturing equipment has a wafer tape including a plurality of alignment holes formed through the wafer tape. A semiconductor wafer is disposed over the wafer tape. The semiconductor wafer includes a circular or rectangular form-factor. A light source is disposed under the wafer tape. The semiconductor wafer is misaligned on the wafer tape with light passing through one or more alignment holes. The semiconductor wafer is centered on the wafer tape with no light passing through one or more alignment holes. The wafer tape has a plurality of wafer alignment markings for different size semiconductor wafers. A light detector is disposed over the semiconductor wafer to detect light passing through the wafer tape. A control arm can be attached to the semiconductor wafer to provide the ability to move the semiconductor wafer in response to a control signal from the light detector.
    Type: Application
    Filed: October 2, 2023
    Publication date: April 3, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Tack Chee Yong, Yi Jing Eric Chong, Kok Lim Jason Ng, Linda Pei Ee Chua
  • Patent number: 12266587
    Abstract: A semiconductor device has a substrate and a semiconductor die disposed over the substrate. A tape is disposed over the semiconductor die. An encapsulant is deposited over the substrate, semiconductor die, and tape. The tape is removed to leave a cavity in the encapsulant over the semiconductor die. A shielding layer is formed over the encapsulant and semiconductor die. A heat spreader is disposed over the shielding layer. The heat spreader includes a protrusion extending into the cavity of the encapsulant.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: April 1, 2025
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: SeungHyun Lee, HeeSoo Lee
  • Patent number: 12266615
    Abstract: A semiconductor device has a semiconductor package including a substrate comprising a land grid array. A component is disposed over the substrate. An encapsulant is deposited over the component. The land grid array remains outside the encapsulant. A fanged metal mask is disposed over the land grid array. A shielding layer is formed over the semiconductor package. The fanged metal mask is removed after forming the shielding layer.
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: April 1, 2025
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, KyoungHee Park, JinHee Jung, OMin Kwon, JiWon Lee, YuJeong Jang
  • Patent number: 12266614
    Abstract: A semiconductor device has a substrate comprising a carrier and an interposer disposed on the carrier. An electrical component is disposed over a first surface of the interposer. An interconnect structure is disposed over the first surface of the interposer. An encapsulant is deposited over the electrical component, interconnect structure, and substrate. A trench is formed through the encapsulant and interposer into the carrier. A shielding layer is formed over the encapsulant and into the trench. The carrier is removed after forming the shielding layer.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: April 1, 2025
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: DeokKyung Yang, HunTeak Lee, HeeSoo Lee, Wanil Lee, SangDuk Lee
  • Publication number: 20250096095
    Abstract: A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die to form a reconstituted wafer. A first insulating layer is formed over the reconstituted wafer. A first dummy opening is formed in the first insulating layer. A first conductive layer is formed on the first insulating layer including a first contact pad over the first dummy opening.
    Type: Application
    Filed: September 18, 2023
    Publication date: March 20, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Peik Eng Ooi, Beng Yee Teh, Linda Pei Ee Chua
  • Patent number: 12255152
    Abstract: A semiconductor device is formed by providing a semiconductor package including a shielding layer and forming a slot in the shielding layer using a laser. The laser is turned on and exposed to the shielding layer with a center of the laser disposed over a first point of the shielding layer. The laser is moved in a loop while the laser remains on and exposed to the shielding layer. Exposure of the laser to the shielding layer is stopped when the center of the laser is disposed over a second point of the shielding layer. A distance between the first point and the second point is approximately equal to a radius of the laser.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: March 18, 2025
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: ChangOh Kim, JinHee Jung, JiWon Lee, YuJeong Jang
  • Publication number: 20250087499
    Abstract: A semiconductor device has a carrier. A first redistribution layer is formed over the carrier. A capping layer is formed on the first redistribution layer. The capping layer includes an anti-reflective coating. An insulating layer is formed on the capping layer. An opening is formed through the insulating layer using photolithography. A conductive layer is formed in the opening.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Kirak Son, JungHwan Jang, KyungHan Ryu, MyongSuk Kang, JaeSeong Choi, YoungJoon Yoon
  • Publication number: 20250087545
    Abstract: A semiconductor device has a pre-molded discrete electrical component and a first encapsulant deposited over the pre-molded discrete electrical component. A first conductive layer is formed over the first encapsulant and pre-molded discrete electrical component. An electrical component is disposed over the first conductive layer. A second encapsulant is deposited over the electrical component and first conductive layer. A second conductive layer is formed over the second encapsulant. A conductive pillar is formed between the first conductive layer and second conductive layer through the second encapsulant. The pre-molded discrete electrical component has a discrete component and a third encapsulant deposited around the discrete component. The discrete component has an electrical terminal, a finish formed over the electrical terminal, and a third conductive layer formed over the finish.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 13, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Kai Chong Chan, Linda Pei Ee Chua, Yung Kuan Hsiao, Beng Yee Teh’, Jian Zuo, Yaojian Lin
  • Publication number: 20250079372
    Abstract: A semiconductor device has a semiconductor wafer or substrate including a plurality of semiconductor die. A plurality of first bumps is formed over an active surface of the semiconductor wafer. A plurality of second bumps is formed within a saw street of the semiconductor wafer separating the plurality of semiconductor die. A top surface of the first bumps is coplanar with a top surface of the second bumps. The second bumps are formed within a first saw street of the semiconductor wafer and further within a second saw street of the semiconductor wafer different from the first saw street. The first bumps are electrically connected to the semiconductor die to provide a function for the semiconductor die. The second bumps are dummy bumps that have no electrical function for the semiconductor die. The semiconductor wafer is singulated through the saw street and second bumps.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 6, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: KyuWon Lee, JiWon Jang, Myeongjin Kim, HyeSun Kim, YoungDeuk Lee, YoungJin Woo
  • Publication number: 20250079380
    Abstract: A semiconductor device has a carrier. An electrical component is disposed over the carrier. An encapsulant is deposited over the electrical component. A conductive layer is formed over the encapsulant. The conductive layer is deposited as a plurality of graphene-coated metal balls in a matrix. The conductive layer is sintered by intensive pulsed light (IPL) irradiation.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 6, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: YongMoo Shin, HeeSoo Lee, SeungHyun Lee
  • Publication number: 20250054902
    Abstract: A semiconductor device has an electrical component with bump structures. A conductive layer is formed over the electrical component with a first segment of the conductive layer coupled between the first and second bumps. The electrical component is disposed on a paddle of a lead frame interposer. A first bond wire is coupled between a first lead and the first bump. A second bond wire is coupled between a second lead and the second bump. A third bond wire is coupled between a third lead and a third bump, and a fourth bond wire is coupled between a fourth lead and a fourth bump. A fifth bond wire coupled between the second lead and third lead and a second segment of the conductive layer is coupled between the third bump and fourth bump to constitute a daisy chain loop to test continuity of the bump structures.
    Type: Application
    Filed: August 12, 2023
    Publication date: February 13, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventor: Peik Eng Ooi
  • Patent number: 12218114
    Abstract: A semiconductor device has an interposer. A first semiconductor die with a photonic portion is disposed over the interposer. The photonic portion extends outside a footprint of the interposer. The interposer and first semiconductor die are disposed over a substrate. An encapsulant is deposited between the interposer and substrate. The photonic portion remains exposed from the encapsulant.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: February 4, 2025
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: KyungOe Kim, YoungCheol Kim, HeeSoo Lee
  • Publication number: 20250038101
    Abstract: A semiconductor device has an electrical component and a plurality of e-bar structures disposed adjacent to the electrical component. An antenna interposer is disposed over a first surface of the e-bar structures. A redistribution layer is formed over a second surface of the e-bar structures opposite the first surface of the e-bar structures. The redistribution layer has a conductive layer and an insulating layer formed over the conductive layer. An encapsulant is deposited over the electrical component. The antenna interposer has a first conductive layer, an insulating layer formed over the first conductive layer, and a second conductive layer formed over the insulating layer. The second conductive layer can be arranged as a plurality of islands or in a serpentine pattern.
    Type: Application
    Filed: July 24, 2023
    Publication date: January 30, 2025
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Ming-Che Hsieh, Linda Pei Ee Chua, Yaojian Lin