Abstract: A semiconductor device has a substrate and an adhesive layer with a graphene core shell deposited over a surface of the substrate. An electrical component is affixed to the substrate with the adhesive layer. A bond wire is connected between the electrical component and substrate. The graphene core shell has a copper core and graphene coating over the copper core. The graphene coated core shell is embedded within a matrix. The graphene core shells within the adhesive layer to form a thermal path. The matrix can be a thermoset material or polymer or composite epoxy type matrix. The graphene core shell is embedded within the thermoset material or polymer or composite epoxy type matrix. The adhesive layer with graphene core shell is useful for die attachment. The graphene core adhesive layer provides exceptional heat dissipation, shock absorption, and vibration dampening.

Abstract: A semiconductor device has a substrate and an electrical component disposed over the substrate. An encapsulant is deposited over the electrical component and substrate. A shielding material, containing a plurality of spheres embedded in a matrix, is formed on the encapsulant. The shielding material 144 can be formed by spray coating, printing, liquid flow, or droplets. The spheres can have a curved or angled shape, e.g., circular, oval, or many flat or curved surfaces joining as a globe. The spheres each have a shell formed over a core. The shell can be a conductive material, while the core is an insulating material. Alternatively, the shell can be an insulating material, while the core is a conductive material. The shielding material scatters electromagnetic interference noise waves by reflection off the shell of the spheres. The shielding material can absorb electromagnetic interference noise waves into the core of the spheres.

Abstract: A semiconductor device has a substrate with a die pad. A conductive material is disposed on the die pad. The conductive material includes a plurality of graphene-coated metal balls in a matrix. A semiconductor die is disposed on the conductive material. The conductive material is sintered using an infrared laser. A bond wire is formed between the semiconductor die and substrate. An encapsulant is deposited over the semiconductor die and bond wire.

Abstract: A semiconductor device has a semiconductor wafer with a first channel formed in the semiconductor wafer and a second channel formed within the first channel to singulate the semiconductor wafer into a plurality of semiconductor die. The first channel and second channel form a T-shaped semiconductor die with a base and a stem extending from the base. A width of the stem is less than a width of the base of the T-shaped semiconductor die. The semiconductor die are disposed over a carrier as a reconstituted semiconductor wafer. An encapsulant is deposited over the reconstituted semiconductor wafer. A first portion of the encapsulant is removed to expose the stem, and a portion of the reconstituted semiconductor wafer is removed to reduce thickness of the semiconductor die. A thickness of the reconstituted semiconductor wafer is less than 100 micrometers after removing the portion of the reconstituted semiconductor wafer.

Abstract: A semiconductor device has a semiconductor substrate and a notch formed around a perimeter of the semiconductor substrate. The semiconductor substrate has a curved surface formed around a perimeter of the semiconductor substrate. A portion of the semiconductor substrate is removed to reduce a thickness of the semiconductor wafer. A first encapsulant is deposited over the semiconductor substrate. The semiconductor substrate is singulated into a plurality of semiconductor die. The semiconductor die are disposed on a carrier as a reconstituted substrate. A second encapsulant is deposited over the reconstituted substrate. A portion of the second encapsulant is removed to reduce a thickness of the reconstituted substrate. An interconnect structure is formed over the semiconductor die and second encapsulant. Bumps are formed over the interconnect structure. A thickness of the semiconductor die is less than 100 micrometers. The reconstituted substrate has a flexible property.

Abstract: A semiconductor device has an electrical component and a heat sink disposed over the electrical component. The heat sink has a cover with a wall extending from the cover forming a pocket around a perimeter of the electrical component. The heat sink also has a horizontal step, and a riser extending from the horizontal step to the cover. The wall extends from the cover to form the pocket. A TIM is disposed between the cover and a surface of the electrical component. The TIM can be liquid metal. The heat sink is pressed onto the TIM under force and heat to distribute the TIM between the cover and surface of the electrical component. The TIM remains contained within the pocket by the wall. The wall or cover can have a vent hole. The TIM may extend over a side surface of the electrical component.

Abstract: A semiconductor device includes a first substrate and a second substrate. A graphene-coated interconnect is disposed between the first substrate and second substrate. A semiconductor die is disposed between the first substrate and second substrate. The first substrate is electrically coupled to the second substrate through the graphene-coated interconnect. An encapsulant is deposited between the first substrate and second substrate.

Abstract: A semiconductor device has a substrate where a portion of the substrate constitutes a blank area absent a conductive layer. A first insulating layer is formed over the blank area. A second insulating layer is formed over the first insulating layer. A plurality of first openings is formed in the first insulating layer over the blank area. A plurality of second openings is formed in the second insulating layer over the blank area. The first openings and second openings can be arranged in parallel rows, oval, circular, serpentine, random, or other geometric shape. A portion of the second openings is aligned with the first openings. A portion of the second openings is offset with respect to the first openings. A third insulating layer, arranged as a plurality of islands of insulating material, can be formed over the substrate within the blank area.

Abstract: A semiconductor manufacturing equipment has a support platform and a substrate disposed over the support platform. A first electrical component is disposed over a first surface of the substrate. A second electrical component is disposed over a second surface of the substrate opposite the first surface of the substrate. A suction hood is disposed over the substrate. A gas is introduced over the substrate to circulate residue while drawing the residue vertically into the suction hood. The gas can be introduced with a gas nozzle or air knife. The gas can be introduced from a gas conduit disposed at least partially around the substrate. The gas conduit can extend completely around the substrate. The gas nozzles are sequentially placed around the gas conduit. The gas can be a stable or inert gas. The residue is displaced away from the second electrical component.

Abstract: A semiconductor device has a substrate and an electrical component disposed over the substrate. An encapsulant is deposited over the electrical component and substrate. A magnetic film material is formed over the encapsulant. The magnetic film material may extend down a side surface of the semiconductor device. The magnetic film material is subject to laser spike annealing in a magnetic field. A shielding layer is formed over the magnetic film material. The laser spike annealing of the magnetic film material in the magnetic field can be done after forming the shielding layer. The shielding layer may extend down a side surface of the semiconductor device. A first magnet is disposed on a first side of the semiconductor device. A second magnet is disposed on a second side of the semiconductor device opposite the first side of the semiconductor device.

Abstract: A semiconductor device has a substrate and an electrical component disposed over the substrate. An encapsulant is deposited over the electrical component. A shielding layer is formed over the encapsulant. The shielding layer includes a plurality of graphene-coated metal balls in a matrix. The shielding layer is sintered using intensive pulsed light (IPL) radiation.

Abstract: A semiconductor device has a semiconductor substrate and first insulating layer formed over the surface of the semiconductor substrate. A dummy via is formed through the first insulating layer. A second insulating layer is formed over the first insulating layer to fill the dummy via. A first conductive layer is formed over the second insulating layer. A bump is formed over the first conductive layer adjacent to the dummy via filled with the second insulating layer. A second conductive layer is formed over a surface of the semiconductor substrate. The dummy via filled with the second insulating layer relieves stress on the second conductive layer. A plurality of dummy vias filled with the second insulating layer can be formed within a designated via formation area. A plurality of dummy vias filled with the second insulating layer can be formed in a pattern.

Abstract: A semiconductor device includes a substrate. A semiconductor die is disposed over the substrate. An encapsulant is deposited over the substrate and semiconductor die. A first trench is formed in the encapsulant over the semiconductor die. A second trench is formed completely through the encapsulant and substrate. A conductive layer is formed over the encapsulant and into the first trench and second trench.

Abstract: A semiconductor device has a first semiconductor package, second semiconductor package, and RDL. The first semiconductor package is disposed over a first surface of the RDL and the second semiconductor package is disposed over a second surface of the RDL opposite the first surface of the RDL. A carrier is initially disposed over the second surface of the RDL and removed after disposing the first semiconductor package over the first surface of the RDL. The first semiconductor package has a substrate, plurality of conductive pillars formed over the substrate, electrical component disposed over the substrate, and encapsulant deposited around the conductive pillars and electrical component. A shielding frame can be disposed around the electrical component. An antenna can be disposed over the first semiconductor package. A portion of the encapsulant is removed to planarize a surface of the encapsulant and expose the conductive pillars.

Abstract: A semiconductor device has a substrate and an electrical component disposed over the substrate. A first encapsulant is deposited over the electrical component and substrate. A first shielding layer with a graphene core shell is formed on a surface of the first encapsulant. A second encapsulant is deposited over the first encapsulant and first shielding layer. A second shielding layer is formed over the second encapsulant. The first shielding layer is formed at least partially in an opening of the first encapsulant. The graphene core shell has a copper core. The first shielding layer has a plurality of cores covered by graphene and the graphene is interconnected within the first shielding layer to form an electrical path. The electrical path dissipates any charge incident on shielding layer, such as an ESD event, to reduce or inhibit the effects of EMI, RFI, and other inter-device interference.

Abstract: A semiconductor device has a substrate. A first semiconductor die and second semiconductor die are disposed over the substrate. A metal bar has an EMI-absorbing material disposed over the metal bar. The metal bar is disposed over the substrate between the first semiconductor die and second semiconductor die. An encapsulant is deposited over the first semiconductor die, second semiconductor die, and metal bar. A shielding layer is formed over the encapsulant.

Abstract: A semiconductor device has an electrical component and an e-bar structure disposed to a side of the electrical component. An encapsulant is deposited over the electrical component and e-bar structure. An RDL is formed over the electrical component, encapsulant, and e-bar structure. The e-bar structure has a core layer, a first conductive layer formed over a first surface of the core layer, and a second conductive layer formed over a second surface of the core layer. The second conductive layer includes a thickness greater than the first conductive layer. The RDL has an insulating layer formed over the electrical component and encapsulant, and a conductive layer formed over the insulating layer. A bump is formed over a contact pad of the e-bar structure opposite the RDL. A contact pad of the electrical component is electrically connected to the RDL opposite the bump.

Abstract: A semiconductor device has a substrate. An electrical component is disposed over a first surface of the substrate. A solder paste is disposed over the first surface of the substrate. A conductive pillar is disposed on the solder paste. An encapsulant is deposited over the first surface of the substrate, the electrical component, and the conductive pillar. A solder bump is formed over the conductive pillar.

Abstract: A semiconductor device has a substrate and a first electrical interconnect structure formed over a first surface of the substrate. A second electrical interconnect structure is formed over a second surface of the substrate. An electrical component is disposed over the first surface of the substrate or over the second surface of the substrate. A first antenna is formed over the first electrical interconnect structure. A second antenna is formed over the second electrical interconnect structure. The first electrical interconnect structure has an insulating material formed over the first surface of the substrate, and a conductive via formed through the insulating material. Alternatively, the first electrical interconnect structure has an insulating layer formed over the first surface of the substrate, a conductive layer formed over the insulating layer, and a conductive via formed through the insulating layer and conductive layer.

Abstract: A semiconductor device has a substrate and an electrical component disposed over a first surface of the substrate. A first encapsulant is deposited over the first surface of the substrate. A second encapsulant is deposited over a second surface of the substrate with a via formed in the second encapsulant. A conductive material containing a graphene core shell is deposited in the via in the second encapsulant to form a conductive post. The graphene core shell can have a copper core with a graphene coating formed over the copper core. The conductive material has a matrix to embed the graphene core shell. The conductive material can have a plurality of cores covered by graphene and the graphene is interconnected within the conductive material to form an electrical path. The conductive material can have thermoset material or polymer or composite epoxy type matrix to embed the graphene core shell.