Abstract: A semiconductor device has a first hybrid substrate with a first thickness, and a second hybrid substrate with a second thickness different from the first thickness of the first hybrid substrate. An encapsulant is deposited around the first hybrid substrate and second hybrid substrate. A portion of the first hybrid substrate and a portion of the second hybrid substrate and a portion of the encapsulant can be removed after encapsulation to achieve uniform thickness for the first hybrid substate and second hybrid substrate. The first hybrid substrate has an embedded substrate, a first interconnect structure formed over a first surface of the embedded substrate, and a second interconnect structure formed over a second surface of the embedded substrate opposite the first surface of the embedded substrate. A plurality of conductive pillars is formed over the first interconnect structure. A plurality of conductive vias is formed through the embedded substrate.

Abstract: A semiconductor device has an electronic component assembly with a substrate and a plurality of electrical components disposed over the substrate. A conductive post is formed over the substrate. A molding compound sheet is disposed over the electrical component assembly. A carrier including a first electrical circuit pattern is disposed over the molding compound sheet. The carrier is pressed against the molding compound sheet to dispose a first encapsulant over and around the electrical component assembly and embed the first electrical circuit pattern in the first encapsulant. A shielding layer can be formed over the electrical components assembly. The carrier is removed to expose the first electrical circuit pattern. A second encapsulant is deposited over the first encapsulant and the first electrical circuit pattern. A second electrical circuit pattern is formed over the second encapsulant. A semiconductor package is disposed over the first electrical circuit pattern.

Abstract: A semiconductor device has a substrate and a first component disposed over a first surface of the substrate. A connector is disposed over the first surface of the substrate. A first encapsulant is deposited over the first component while the connector remains outside of the first encapsulant. A shielding layer is formed over the first encapsulant while the connector remains outside of the shielding layer. A second component is disposed over a second surface of the substrate. A solder bump is disposed over the second surface of the substrate. A second encapsulant is deposited over the second surface of the substrate. An opening is formed through the second encapsulant to expose the solder bump. A solder ball is disposed in the opening. The solder ball and solder bump are reflowed to form a combined solder bump.

Abstract: A semiconductor device has a substrate. A first electrical component and second electrical component are disposed over the substrate. A conductive pillar is formed over the substrate between the first electrical component and second electrical component. A first shielding layer is formed over the first electrical component and conductive pillar by jet printing conductive material. A second shielding layer is formed over the first electrical component and second electrical component by sputtering, spraying, or plating conductive material. An insulating layer is optionally formed between the first shielding layer and second shielding layer by jet printing insulating material over the first shielding layer.

Abstract: A semiconductor device has an integrated passive device (IPD) wafer including an IPD formed on the IPD wafer. A semiconductor die is mounted on the IPD wafer. An interconnect structure is mounted on the IPD wafer. The IPD wafer is singulated to provide an IPD die with the IPD, semiconductor die, and interconnect structure. An encapsulant is deposited over the IPD die with the interconnect structure exposed from the encapsulant. A shielding layer is formed over the encapsulant.

Abstract: A semiconductor device has a plurality of stacked semiconductor assemblies. Each semiconductor assembly has a first electrical component, and an electrical connector disposed adjacent to the first electrical component. A conductive layer with a graphene core shell is formed between the first electrical component and electrical connector. The graphene core shell has a copper core or silver core. The conductive layer has a plurality of cores covered by graphene and the graphene is interconnected within the conductive layer to form an electrical path. The conductive layer has a thermoset material or polymer or composite epoxy type matrix. A second electrical component is disposed adjacent to a side of the electrical connector opposite the first electrical component. An encapsulant is deposited around the first electrical component, second electrical component, and electrical connector. The conductive layer is formed between the second electrical component and electrical connector over the encapsulant.

Abstract: A semiconductor device has a semiconductor die. A first dielectric layer is formed over the semiconductor die. A second dielectric layer is formed over the first dielectric layer. A trench is formed in the second dielectric layer. A via opening is formed to expose a contact pad of the semiconductor die within the trench. A seed layer is formed over the second dielectric layer. The seed layer extends into the trench and via opening. A conductive material is deposited into the via opening and trench. The conductive material is overburdened from the trench. The seed layer around the conductive material is etched in a first etching step. The conductive material is etched in a second etching step.

Abstract: A semiconductor device has a first semiconductor die and a first insulating layer formed over the first semiconductor die. A trench is formed in the first insulating layer. A second insulating layer is formed over the first insulating layer. A recess forms in the second insulating layer over the trench automatically as part of the formation process of the second insulating layer. A second semiconductor die is mounted over the second insulating layer. The recess completely surrounds the second semiconductor die in plan view. An underfill is dispensed between the first semiconductor die and second semiconductor die.

Abstract: A semiconductor device has a substrate and an electrical component disposed over a surface of the substrate. An antenna can be formed within the substrate. An encapsulant is deposited over the surface of the substrate. An ink material is deposited over the surface of the substrate. The ink material can be a curable epoxy. The ink material is formed as a straight wall, curved wall, stepped wall, stepped convex wall, and such. The ink material can be stacked with a first ink material deposited on the surface of the substrate and a second ink material deposited over the first ink material. A shielding material is disposed over the encapsulant with the ink material blocking progression of the shielding material. An electrical connector is disposed over the surface of the substrate outside the ink material to avoid contact with the shielding material.

Abstract: A semiconductor device has a substrate. An electrical component is disposed over a surface of the substrate. An encapsulant is deposited over the electrical component and substrate. A portion of the surface of the substrate remains exposed from the encapsulant. A shielding layer is formed over the encapsulant. A portion of the shielding layer is removed to expose the portion of the surface of the substrate.

Abstract: A semiconductor device has a substrate comprising a carrier and an interposer disposed on the carrier. An electrical component is disposed over a first surface of the interposer. An interconnect structure is disposed over the first surface of the interposer. An encapsulant is deposited over the electrical component, interconnect structure, and substrate. A trench is formed through the encapsulant and interposer into the carrier. A shielding layer is formed over the encapsulant and into the trench. The carrier is removed after forming the shielding layer.

Abstract: A semiconductor device has a semiconductor package including a substrate comprising a land grid array. A component is disposed over the substrate. An encapsulant is deposited over the component. The land grid array remains outside the encapsulant. A fanged metal mask is disposed over the land grid array. A shielding layer is formed over the semiconductor package. The fanged metal mask is removed after forming the shielding layer.

Abstract: A semiconductor device has a substrate and electrical components disposed over the substrate. An encapsulant is disposed over the substrate and electrical components. A multi-layer shielding structure is formed over the encapsulant. The multi-layer shielding structure has a first layer of ferromagnetic material and second layer of a protective layer or conductive layer. The ferromagnetic material can be iron, nickel, nickel iron alloy, iron silicon alloy, silicon steel, nickel iron molybdenum alloy, nickel iron molybdenum copper alloy, iron silicon aluminum alloy, nickel zinc, manganese zinc, other ferrites, amorphous magnetic alloy, amorphous metal alloy, or nanocrystalline alloy. The first layer can be a single, homogeneous material. The protective layer can be stainless steel, tantalum, molybdenum, titanium, nickel, or chromium. The conductive layer can be copper, silver, gold, or aluminum.

Abstract: A semiconductor device is made by providing a strip substrate including a plurality of units. A hole is formed in the strip substrate. An encapsulant is deposited over the strip substrate. A mask is disposed over the strip substrate and encapsulant with a leg of the mask disposed in the hole. A shielding layer is formed over the mask and strip substrate. The mask is removed after forming the shielding layer. The strip substrate is singulated to separate the plurality of units from each other after forming the shielding layer.

Abstract: A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system. The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die.

Abstract: A semiconductor package including a first redistribution structure, a second redistribution structure disposed on the first redistribution structure, a semiconductor chip disposed on an upper surface of the second redistribution structure, a bridge chip disposed on a lower surface of the second redistribution structure, a molding layer disposed between the first redistribution structure and the second redistribution structure, where the molding layer surrounds the bridge chip, and a stiffener disposed on the upper surface of the second redistribution structure. The stiffener includes an opening. The semiconductor chip is disposed in the opening of the stiffener.

Abstract: A semiconductor package that includes an upper package including a first package substrate, a first semiconductor chip mounted on the first package substrate, and a first molding layer surrounding the first semiconductor chip; a printed circuit board (PCB) on which the upper package is mounted in a central region; and a stiffener positioned on a top surface of the PCB and including an opening. A top surface of the PCB contacts a bottom surface of the stiffener in at least part of edge regions of the PCB. In the central region of the PCB and in edge regions other than the at least part of edge regions of the PCB, a top surface of the PCB is apart from the bottom surface of the stiffener in a vertical direction, and the opening of the stiffener overlaps the upper package in the vertical direction.

Abstract: A semiconductor device has a first interconnect structure. A pre-molded bridge die is disposed over the first interconnect structure. An encapsulant is deposited over the pre-molded bridge die. A second interconnect structure is disposed over the encapsulant and pre-molded bridge die. A first semiconductor die is disposed over the second interconnect structure within a footprint of the pre-molded bridge die. A second semiconductor die is disposed over the second interconnect structure within the footprint of the pre-molded bridge die.

Abstract: A semiconductor device has an electrical component and a first interconnect structure disposed adjacent to the electrical component. The electrical component can be a direct metal bonded semiconductor die or a flipchip semiconductor die. The first interconnect structure can be an interposer unit or a conductive pillar. A split antenna is disposed over the electrical component and first interconnect structure. The split antenna has a first antenna section and a second antenna section with an adhesive material disposed between the first antenna section and second antenna section. A second interconnect structure is formed over the electrical component and first interconnect structure. The second interconnect structure has one or more conductive layers and insulating layers. The first interconnect structure and second interconnect structure provide a conduction path between the electrical component and split antenna. An encapsulant is deposited around the electrical component and first interconnect structure.

Abstract: A semiconductor device is formed by providing a semiconductor package including a shielding layer and forming a slot in the shielding layer using a laser. The laser is turned on and exposed to the shielding layer with a center of the laser disposed over a first point of the shielding layer. The laser is moved in a loop while the laser remains on and exposed to the shielding layer. Exposure of the laser to the shielding layer is stopped when the center of the laser is disposed over a second point of the shielding layer. A distance between the first point and the second point is approximately equal to a radius of the laser.