Patents Assigned to STMicroelectronic S.r.l.
  • Publication number: 20240145429
    Abstract: Laser direct structuring, LDS material is molded onto semiconductor dice arranged on die pads in a leadframe and the semiconductor dice are electrically coupled with electrically conductive leads in the leadframe via electrical connections that comprise electrically conductive formations exposed at the front surface of the LDS material, electrically conductive vias between the semiconductor dice and the front surface of the LDS material, as well as electrically conductive lines over the front surface of the LDS material that couple selected ones of the electrically conductive formations with selected ones of the second electrically conductive vias. The electrically conductive vias and lines are provided applying laser beam energy to the front surface of the laser direct structuring material at spatial positions located as a function of the electrically conductive formations exposed at the front surface of the LDS material acting as fiducials.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 2, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Riccardo VILLA, Guendalina CATALANO
  • Publication number: 20240146195
    Abstract: Disclosed herein is a DC-DC converter including a power section and a bootstrap circuit for driving the gate of the high-side transistor of the power section. The bootstrap circuit includes an adaptive clamp circuit that maintains a proper voltage differential across the bootstrap capacitor within the bootstrap circuit for recharge during off-times regardless of whether the mode of operation of the DC-DC converter continuous conduction mode (CCM), discontinuous conduction mode (DCM), or pulse-skip mode. This voltage differential is established as being between a bootstrap voltage and a voltage at a tap between the high and low side transistors of the power section. The adaptive clamp circuit maintains the bootstrap voltage as following the lesser of the output voltage and the voltage at the tap.
    Type: Application
    Filed: November 2, 2022
    Publication date: May 2, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventors: Marco ATTANASIO, Giovanni BELLOTTI
  • Publication number: 20240145351
    Abstract: A semiconductor die is arranged on a first surface of a leadframe having a first thickness between the first surface and a second surface opposite the first surface and an array of electrically conductive leads. Terminal recesses are provided in the electrically conductive leads in the array at the first surface. At the terminal recesses, the electrically conductive leads have a second thickness less than the first thickness. The semiconductor die is coupled with the electrically conductive leads via wires or ribbons having ends coupled to the electrically conductive leads arranged in the terminal recesses. The leadframe is partially cut starting from the second surface at the terminal recesses with a cutting depth between the first thickness and the second thickness. The partial cut produces exposed surfaces of the electrically conductive leads and the ends of the electrically conductive elongated formations providing wettable flanks for solder material.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 2, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventors: Matteo DE SANTA, Mauro MAZZOLA
  • Publication number: 20240145355
    Abstract: A leadframe includes a die pad and electrically conductive leads arranged peripherally of the die pad. A semiconductor die is mounted to the die pad. The die is electrically coupled to the electrically conductive leads using an electrical coupling member applied onto the semiconductor die. The electrical coupling member includes a planar body configured to cover the semiconductor die and the electrically conductive leads. The planar body of the electrical coupling member includes strip-like, electrically conductive formations embedded in an electrically insulating material. Each strip-like, electrically conductive formation has a first end configured to contact the semiconductor die and a second end configured to contact the electrically conductive lead.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 2, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventor: Mauro MAZZOLA
  • Publication number: 20240142294
    Abstract: The present disclosure is directed to a method for detecting a liquid on a main surface of a body. The method is performed through a detection device including a processing module, a reference electrode at a reference electric voltage and a first sensing electrode on the main surface and configurated to detect an environmental electric and/or electrostatic charge variation indicative of the presence of the liquid. The method includes the steps of: biasing the first sensing electrode to a bias electric voltage; while the first sensing electrode is at the bias electric voltage, acquiring a first charge variation signal indicative of the electric and/or electrostatic charge variation detected by the first sensing electrode; verifying whether the first charge variation signal is indicative of the presence of the liquid on the main surface, at the first sensing electrode; and, if it is, determining the presence of the liquid on the main surface at the first sensing electrode.
    Type: Application
    Filed: August 30, 2023
    Publication date: May 2, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Stefano Paolo RIVOLTA, Andrea LABOMBARDA, Carlo GUADALUPI, Mauro BARDONE
  • Publication number: 20240142235
    Abstract: A microelectromechanical gyroscope with detection along a vertical axis is provided with a detection structure having a movable structure, suspended above a substrate so as to perform, as a function of an angular velocity around the vertical axis a sense movement along a first horizontal axis. The movable structure has at least one drive mass internally defining a window, elastically coupled to a rotor anchor, at an anchoring region, through elastic anchoring elements; at least one bridge element, rigid and of a conductive material, cantilevered suspended and extending within the window along the first horizontal axis, elastically coupled to the drive mass; movable electrodes, carried integrally by the bridge element with extension along a second horizontal axis.
    Type: Application
    Filed: October 19, 2023
    Publication date: May 2, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Paola CARULLI, Luca Giuseppe FALORNI, Patrick FEDELI, Luca GUERINONI
  • Publication number: 20240141543
    Abstract: Articles such as substrates for semiconductor products comprising metal and resin portions with adhesion promoter material are processed in a plating bath, wherein the adhesion promoter material is exposed to dissolution as a result of prolonged exposure to the plating bath. The articles are processed by dipping them in the processing bath so that they have opposed surfaces exposed to the processing bath. The movement of the articles through the processing bath B may occur to be halted. In that case a gas flow is provided lapping the opposed surfaces of the articles to shield the opposed surfaces of the articles from exposure to the processing bath.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 2, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventor: Paolo CREMA
  • Publication number: 20240140783
    Abstract: A device and method for manufacturing a device comprising two semiconductor dice. The device is formed by a first die and a second die. The first die is of semiconductor material and integrates electronic components. The second die has a main surface, forms patterned structures, and is bonded to the first die. Internal electrical coupling structures electrically couple the main surface of the first die to the second die. External connection regions extend on the main surface of the first die. A package packages the first die, the second die and the internal electrical coupling structures and partially surrounds the external connection regions, the external connection regions partially protruding from the package.
    Type: Application
    Filed: October 18, 2023
    Publication date: May 2, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Mark Andrew SHAW, Lorenzo CORSO, Matteo GARAVAGLIA, Giorgio ALLEGATO
  • Publication number: 20240145364
    Abstract: A BGA package includes an array of electrically conductive balls providing electrical contact for a semiconductor die. A power channel is provided to convey power supply current towards the semiconductor die. The power channel is formed by a stack of electrically conductive planes. The electrically conductive planes are stacked in a stepped arrangement wherein a number of stacked planes in each step of the stack increases in a direction from a distal end to a proximal end of the power channel. Adjacent electrically conductive planes in the stack of the power channel are electrically coupled with electrically conductive vias extending therebetween. Current conduction paths towards the die area thus have resistance values that decrease from the distal end to the proximal end of the power channel.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 2, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventors: Aurora SANNA, Cristina SOMMA, Damian HALICKI
  • Patent number: 11973457
    Abstract: An embodiment driver circuit comprises a power supply pin configured to receive a power supply voltage, and a set of control pins configured to provide a set of control signals for controlling switching of a set of switches of an h-bridge circuit comprising a pair of high-side switches and a pair of low-side switches. The driver circuit comprises control circuitry coupled to the control pins and configured to generate the control signals, and sensing circuitry coupled to the power supply pin and configured to generate a detection signal indicative of the power supply voltage exceeding a threshold value. The control circuitry is sensitive to the detection signal and is configured to generate the control signals to activate one of the pair of high-side switches and the pair of low-side switches and de-activate the other of the pair of high-side switches and the pair of low-side switches.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: April 30, 2024
    Assignees: STMicroelectronics (Alps) SAS, STMicroelectronics S.r.l., STMicroelectronics Application GMBH
    Inventors: Aldo Occhipinti, Christophe Roussel, Fritz Burkhardt, Ignazio Testoni
  • Patent number: 11969757
    Abstract: A method for manufacturing a PMUT device including a piezoelectric element located at a membrane element is provided. The method includes receiving a silicon on insulator substrate having a first silicon layer, an oxide layer, and a second silicon layer. Portions of a first surface of the second silicon layer are exposed by removing exposed side portions of the first silicon layer and corresponding portions of the oxide layer, and a central portion including the remaining portions of the first silicon layer and of the oxide layer is defined. Anchor portions for the membrane element are formed at the exposed portions of the first surface of the second silicon layer. The piezoelectric element is formed above the central portion, and the membrane element is defined by selectively removing the second layer and removing the remaining portion of the oxide from under the remaining portion of the first silicon layer.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: April 30, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Federico Vercesi, Alessandro Danei, Giorgio Allegato, Gabriele Gattere, Roberto Campedelli
  • Patent number: 11971284
    Abstract: Embodiments of a Coriolis-force-based flow sensing device and embodiments of methods for manufacturing embodiments of the Coriolis-force-based flow sensing device, comprising the steps of: forming a driving electrode; forming, on the driving electrode, a first sacrificial region; forming, on the first sacrificial region, a first structural portion with a second sacrificial region buried therein; forming openings for selectively etching the second sacrificial region; forming, within the openings, a porous layer having pores; removing the second sacrificial region through the pores of the porous layer, forming a buried channel; growing, on the porous layer and not within the buried channel, a second structural portion that forms, with the first structural region, a structural body; selectively removing the first sacrificial region thus suspending the structural body on the driving electrode.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: April 30, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Gabriele Gattere, Francesco Rizzini, Luca Guerinoni, Lorenzo Corso, Domenico Giusti
  • Publication number: 20240133843
    Abstract: An integrated electronic system is provided with a package formed by a support base and a coating region arranged on the support base and having at least a first system die, including semiconductor material, coupled to the support base and arranged in the coating region. The integrated electronic system also has, within the package, a monitoring system configured to determine the onset of defects within the coating region, through the emission of acoustic detection waves and the acquisition of corresponding received acoustic waves, whose characteristics are affected by, and therefore are indicative of, the aforementioned defects.
    Type: Application
    Filed: October 17, 2023
    Publication date: April 25, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Domenico GIUSTI, Marco DEL SARTO, Fabio QUAGLIA, Enri DUQI
  • Publication number: 20240136260
    Abstract: An HV MOSFET device has a body integrating source conductive regions. Projecting gate structures are disposed above the body, laterally offset with respect to the source conductive regions. Source contact regions, of a first metal, are arranged on the body in electric contact with the source conductive regions, and source connection regions, of a second metal, are arranged above the source contact regions and have a height protruding with respect to the projecting gate structures. A package includes a metal support bonded to a second surface of the body, and a dissipating region, above the first surface of the semiconductor die. The dissipating region includes a conductive plate having a planar face bonded to the source connection regions and spaced from the projecting gate structures. A package mass of dielectric material is disposed between the support and the dissipating region and incorporates the semiconductor die. The dissipating region is a DBC-type insulation multilayer.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 25, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Cristiano Gianluca STELLA, Fabio RUSSO
  • Publication number: 20240134056
    Abstract: A method corrects an ionospheric error affecting pseudo-range measurements in a GNSS receiver receiving a plurality of satellite signals from a plurality of satellites of the constellation of satellites. The method is performed in a navigation processing procedure performed at a GNSS receiver, receiving pseudo-range measurements previously calculated by the GNSS receiver obtained from a first carrier signal and a second carrier signal in the satellite signals, in particular in GPS bands L1 and L5. The method includes performing a correction procedure of the pseudo-range measurements including applying to the pseudo-range measurements corrections for predictable errors obtaining corrected pseudo-ranges and applying to the corrected pseudo-range measurements a further ionospheric error correction calculation to obtain further ionospheric error correction values.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 25, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Michele RENNA, Nicola Matteo PALELLA
  • Patent number: 11965739
    Abstract: The MEMS gyroscope is formed by a substrate, a first mass and a second mass, wherein the first and the second masses are suspended over the substrate and extend, at rest, in a plane of extension defining a first direction and a second direction transverse to the first direction. The MEMS gyroscope further has a drive structure coupled to the first mass and configured, in use, to cause a movement of the first mass in the first direction, and an elastic coupling structure, which extends between the first mass and the second mass and is configured to couple the movement of the first mass in the first direction with a movement of the second mass in the second direction. The elastic coupling structure has a first portion having a first stiffness and a second portion having a second stiffness greater than the first stiffness.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: April 23, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Daniele Prati, Luca Giuseppe Falorni, Luca Guerinoni
  • Patent number: 11965923
    Abstract: The present disclosure is directed to self-tests for electrostatic charge variation sensors. The self-tests ensure an electrostatic charge variation sensor is functioning properly. The self-tests may be performed while an electrostatic charge variation sensor is active and without interruption to the application employing the electrostatic charge variation sensor.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: April 23, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Fabio Passaniti, Daniele De Pascalis, Enrico Rosario Alessi
  • Patent number: 11967544
    Abstract: In providing electrical wire-like connections between at least one semiconductor die arranged on a semiconductor die mounting area of a substrate and an array of electrically-conductive leads in the substrate, pressure force is applied to the electrically-conductive leads in the substrate during bonding the wire-like connections to the electrically-conductive leads. Such a pressure force is applied to the electrically-conductive leads in the substrate via a pair of mutually co-operating force transmitting surfaces. These surfaces include a first convex surface engaging a second concave surface.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: April 23, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Mauro Mazzola, Matteo De Santa
  • Patent number: 11965906
    Abstract: A closed-loop microelectromechanical accelerometer includes a substrate of semiconductor material, an out-of-plane sensing mass and feedback electrodes. The out-of-plane sensing mass, of semiconductor material, has a first side facing the supporting body and a second side opposite to the first side. The out-of-plane sensing mass is also connected to the supporting body to oscillate around a non-barycentric fulcrum axis parallel to the first side and to the second side and perpendicular to an out-of-plane sensing axis. The feedback electrodes are capacitively coupled to the sensing mass and are configured to apply opposite electrostatic forces to the sensing mass.
    Type: Grant
    Filed: July 15, 2022
    Date of Patent: April 23, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Gabriele Gattere, Jean Marie Darmanin, Francesco Rizzini, Carlo Valzasina
  • Patent number: 11968602
    Abstract: In an embodiment, a device comprises a memory, which, in operation, stores data samples associated with a plurality of data sensors, and circuitry, coupled to the memory, wherein the circuitry, in operation, generates synchronized output data sets associated with the plurality of data sensors. Generating a synchronized output data set includes: determining a reference sample associated with a sensor of the plurality of sensors; verifying a timing validity of a data sample associated with another sensor of the plurality of sensors; identifying a closest-in-time data sample associated with the another sensor of the plurality of sensors with respect to the reference sample; and generating the synchronized output data set based on interpolation.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: April 23, 2024
    Assignees: STMICROELECTRONICS S.r.l., STMICROELECTRONICS, INC.
    Inventors: Karimuddin Sayed, Chandandeep Singh Pabla, Lorenzo Bracco, Federico Rizzardini