Abstract: A first current proportional to absolute temperature flows in a first current line through a first p-n junction and a second p-n junction arranged in series. A cascaded arrangement of p-n junctions is coupled to the second p-n junction and includes a further p-n junction with a current flowing therethrough that has a third order proportionality on absolute temperature. A differential circuit has a first input coupled to the further p-n junction and a second input coupled to a current mirror from the first p-n junction, with the differential circuit configured to generate a bandgap voltage with a low temperature drift from a sum of first voltage (that is PTAT) derived from the first current and a second voltage (that is PTAT3) derived from the third current.

Abstract: A control device for a converter of the switched-mode type provided with an inductor element and a switch element generates a driving signal for controlling switching of the switch element and determining alternately a phase of storage of energy in the inductor element as a function of an input quantity and a phase of transfer of the energy stored in the inductor element to an output element on which an output quantity is present; the control device generates the driving signal by means of a control based on the value of the output quantity in order to regulate the same output quantity. In particular, an estimation block determines an estimated value of the output quantity, and a driving block generates the driving signal as a function of said estimated value.

Abstract: In order to perform, according to a received signal (r), a channel-estimation procedure and a cell-search procedure in cellular communication systems, there are executed at least one first operation of correlation of said received signal (r) with secondary synchronization codes (SSC) and a second operation of correlation of said received signal (r) with known midamble codes (mid, MPL, MPS), whilst said channel-estimation procedure comprises a third operation of correlation of at least part of said received signal (r) with known midamble codes (mid, MPL, MPS), said first, second, and third correlation operation being executed by sending at least part (emidamble) of said received signal (r) to an input of a correlation bank.

Abstract: A method of controlling a process driven by a control signal for producing a corresponding output includes producing an error signal as a function of a state of the process and of a reference signal. A control signal is generated as a function of the error signal and of a parameter adjustment signal. The control signal is applied to the process. A derived signal representative of a quantity to be minimized is calculated by processing paired values of the state of the process and the control signal. A correction signal is calculated from a set of several different values of the control signal that minimizes the derived signal. The parameter adjustment signal is calculated by a neural network and fuzzy logic processor from the error signal and the correction signal. The correction signal is periodically calculated by a Quantum Genetic Search Algorithm that results from a merging of a genetic algorithm and a quantum search algorithm.

Abstract: A transistor includes a substrate region (14) of a first type (P) of conductivity in a semiconductor material layer of the same type (P) of conductivity, at least a first contact region (13) of the first type (P+) of conductivity inside the substrate region (14) and adjacent to a first terminal (C) of the transistor, a well (11) of second type (N) of conductivity placed inside the substrate region (14), wherein the well (11) of second type (N) of conductivity includes at least a second contact region (12) of a second type of conductivity (N+) adjacent to a region of a second terminal (B) of the transistor, and a plurality of third contact regions (10) of the first type of conductivity (P+) adjacent to a plurality of regions of a third terminal (E1, . . . , E3) of the transistor interposed each one (10) and other (12) by proper insulating shapes (20).

Abstract: The high-gain photodetector is formed in a semiconductor-material body which houses a PN junction and a sensitive region that is doped with rare earths, for example erbium. The PN junction forms an acceleration and gain region separate from the sensitive region. The PN junction is reverse-biased and generates an extensive depletion region accommodating the sensitive region. Thereby, the incident photon having a frequency equal to the absorption frequency of the used rare earth crosses the PN junction, which is transparent to light, can be captured by an erbium ion in the sensitive region, so as to generate a primary electron, which is accelerated towards the PN junction by the electric field present, and can, in turn, generate secondary electrons by impact, according to an avalanche process. Thereby, a single photon can give rise to a cascade of electrons, thus considerably increasing detection efficiency.

Abstract: A switching regulator circuit produces a varying reference voltage with temperature and includes at least one band-gap generator for supplying a power stage through an error amplifier and a comparator. The error amplifier is also supplied a regulated voltage which may be produced by the regulator itself. The at least one band-gap generator includes a plurality of band-gap generators being supplied by the regulated voltage and input a fraction of the regulated voltage through a voltage divider. The respective outputs of the band-gap generators are connected to a logic network which has an output connected to the power stage. The error amplifier and comparator may be included within each respective band-gap generator.

Abstract: A low-consumption TTL-CMOS input buffer stage includes a chain of inverters cascade connected between an input receiving electric signals at a TTL logic level and an output reproducing electric signals at a CMOS logic level, and powered between a first or supply voltage reference and a second or ground reference. Advantageously, the first inverter in the chain includes a means of selecting the delivery path to the stage according to an activate signal for a low-consumption operation mode. In essence, the first inverter of the buffer has two signal paths: one for normal operation and the other for low consumption operation.

Abstract: An output circuit for an integrated circuit, includes a first transistor and a second transistor connected in series between a first external voltage and a second external voltage external to the integrated circuit, respectively through first and second electrical connecting paths. The first transistor is for carrying an output line of the integrated circuit to the first external voltage, while the second transistor is for carrying the external line of the integrated circuit to the second external voltage. The second transistor is formed inside a first well of a first conductivity type contained inside a second well of a second conductivity type formed in a substrate of the first conductivity type. The second well of the second conductivity type is connected to the first external voltage through a third electrical connecting path distinct from the first electrical connecting path.