Patents Assigned to STMicroelectronics A.A.
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Publication number: 20220333912Abstract: The present disclosure is directed to a system and method of controlling a facial recognition process by validating preconditions with a ranging sensor. The ranging sensor transmits a ranging signal that is reflected off of a user's face and received back at the ranging sensor. The received ranging signal can be used to determine distance between the user's face and the mobile device or to determine the reflectivity of the user's face. Comparing the distance to a range of distances corresponding to normal operation of the device or normal reflectivities associated with human skin tones can reduce the number of false positive activations of the facial recognition process. Furthermore, a multiple zone ranging sensor can produce a face depth map that can be compared to a stored face depth map or can produce a reflectivity map that can be compared to a stored face reflectivity map to further increase power efficiency and device security.Type: ApplicationFiled: July 1, 2022Publication date: October 20, 2022Applicant: STMICROELECTRONICS, INC.Inventors: Arnaud DELEULE, John E. KVAM, Kalyan-Kumar VADLAMUDI-REDDY
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Publication number: 20220332650Abstract: The present disclosure relates to a method for the preparation of a precursor solution for a ceramic of the BZT-aBXT type wherein X is selected from Ca, Sn, Mn and Nb and a is a molar fraction selected in the range between 0.10 and 0.Type: ApplicationFiled: March 31, 2022Publication date: October 20, 2022Applicant: STMicroelectronics S.R.L.Inventors: Valeria CASUSCELLI, Rossana SCALDAFERRI, Paola Sabrina BARBATO
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Publication number: 20220336651Abstract: The disclosure concerns a device which comprises a stack of two high electron mobility transistors, referred to as first and second transistor, separated by an insulating layer and each provided with a stack of semiconductor layers respectively referred to as first stack and second stack, the first and the second stack each comprising, from the insulating layer to, respectively, a first and a second surface, a barrier layer and a channel layer, the first and the second transistor respectively comprising a first set of electrodes and a second set of electrodes, the first and the second set of electrodes each comprising a source electrode, a drain electrode, and a gate electrode which are arranged so that the first and the second transistor are electrically connected head-to-tail.Type: ApplicationFiled: April 1, 2022Publication date: October 20, 2022Applicants: Exagan SAS, STMicroelectronics International N.V.Inventors: Matthieu NONGAILLARD, Thomas OHEIX
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Patent number: 11474788Abstract: A memory array arranged in multiple columns and rows. Computation circuits that each calculate a computation value from cell values in a corresponding column. A column multiplexer cycles through multiple data lines that each corresponds to a computation circuit. Cluster cycle management circuitry determines a number of multiplexer cycles based on a number of columns storing data of a compute cluster. A sensing circuit obtains the computation values from the computation circuits via the column multiplexer as the column multiplexer cycles through the data lines. The sensing circuit combines the obtained computation values over the determined number of multiplexer cycles. A first clock may initiate the multiplexer to cycle through its data lines for the determined number of multiplexer cycles, and a second clock may initiate each individual cycle. The multiplexer or additional circuitry may be utilized to modify the order in which data is written to the columns.Type: GrantFiled: June 2, 2020Date of Patent: October 18, 2022Assignees: STMICROELECTRONICS S.r.l., STMicroelectronics International N.V.Inventors: Nitin Chawla, Tanmoy Roy, Anuj Grover, Giuseppe Desoli
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Patent number: 11473894Abstract: A computing system includes a first hardware element having a first accelerometer and a first gyroscope, and a second hardware element having a second accelerometer and a second gyroscope. The first and second hardware elements are moveable with respect to each other. The computing system recursively generates a result signal indicative of a relative orientation of the first and second hardware elements with respect to each other. The result signal may be generated by generating a first intermediate signal indicative of a angle between the first and second hardware elements based on signals generated by the first and second accelerometers and generating a second intermediate signal indicative of the angle based on signals generated by the first and second gyroscopes. The result signal indicative of the angle may be generated as a weighted sum of the first intermediate signal and the second intermediate signal. At least one of the first and second hardware elements is controlled by on the result signal.Type: GrantFiled: March 19, 2021Date of Patent: October 18, 2022Assignee: STMicroelectronics S.r.l.Inventors: Alberto Zancanato, Michele Ferraina, Federico Rizzardini, Stefano Paolo Rivolta
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Patent number: 11476018Abstract: An amplifier receives an input and a feedback. A first transistor controlled by the amplifier output is coupled between a supply node and the feedback. A second transistor controlled by the amplifier output is coupled to the supply node and generates a bias current. A trimmed resistor coupled between the feedback and ground includes, for trimming resolution of N-bits, where X+Y=N: M resistors, where M=2X?1, each having a resistance equal to R*(2Y)*i, i being an index having a value ranging from 1 to 2X?1, a first of the M resistors having a resistance of R*2Y, a last of the M resistors having a resistance of R*2Y*(2X?1); and M switches associated with the M resistors. Each of the M resistors is between a first node and its associated one of the M switches. Each of the M switches couples its associated one of the M resistors to a second node.Type: GrantFiled: July 26, 2021Date of Patent: October 18, 2022Assignee: STMicroelectronics International N.V.Inventors: Mohit Kaushik, Anil Kumar
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Patent number: 11474317Abstract: A photonic system includes a first photonic circuit having a first face and a second photonic circuit having a second face. The first photonic circuit comprises first wave guides, and, for each first wave guide, a second wave guide covering the first wave guide, the second wave guides being in contact with the first face and placed between the first face and the second face, the first wave guides being located on the side of the first face opposite the second wave guides. The second photonic circuit comprises, for each second wave guide, a third wave guide covering the second wave guide. The first photonic circuit comprises first positioning devices projecting from the first face and the second photonic circuit comprises second positioning devices projecting from the second face, at least one of the first positioning devices abutting one of the second positioning devices in a first direction.Type: GrantFiled: January 21, 2020Date of Patent: October 18, 2022Assignee: STMICROELECTRONICS (CROLLES 2) SASInventors: Jean-Francois Carpentier, Charles Baudot
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Patent number: 11475757Abstract: A method includes: receiving IR radiation with a plurality of IR sensors; producing a plurality of output signals with the plurality of IR sensors based on the received IR radiation, where each of the plurality of output signals is indicative of an intensity of the IR radiation received by a respective IR sensor of the plurality of IR sensors; detecting an IR source based on the plurality of output signals; generating a candidate alarm in response to detecting the IR source; determining whether the detected IR source matches any reference IR source of a set of reference IR sources; when the detected IR source matches one reference IR source of the set of reference IR sources, issuing a user alarm, and when the detected IR source does not match any reference IR source of the set of reference IR sources, canceling the candidate alarm without issuing the user alarm.Type: GrantFiled: May 18, 2021Date of Patent: October 18, 2022Assignee: STMicroelectronics S.r.l.Inventors: Enrico Rosario Alessi, Fabio Passaniti
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Patent number: 11476892Abstract: In an embodiment, a circuit includes first, second, and third 90° hybrid couplers coupled between first and second antenna terminals, a pair of low-noise amplifiers (LNAs), and a pair of power amplifiers (PAs). The pair of LNAs is configured to receive first signals from the first and second antenna terminals and has an output configured to be coupled to a receive path. The second coupler is configured in power combiner mode for receiving the first signals. The pair of PAs is configured to transmit second signals via the first and second antenna terminals and has an input configured to be coupled to a transmit path. The third coupler is configured in power divider mode for transmitting the second signals.Type: GrantFiled: October 20, 2021Date of Patent: October 18, 2022Assignee: STMICROELECTRONICS SAInventors: Jeremie Forest, Vincent Knopik
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Patent number: 11474425Abstract: A control circuit includes a first control circuit generating a first drive control signal from a pre-drive signal (that is a frequency at which an opening angle of the first and second mirrors is equal) for the first mirror. A second control circuit generates a second drive control signal from the pre-drive signal for the second mirror. First and second drivers generate first and second drive signals for the first and second mirrors from the first and second drive control signals. The first and second drive control signals are generated so that the first and second drive signals each have a same frequency as the pre-drive signal but are different in amplitude from one another to cause the first and second mirrors to move at a same frequency, with a same and substantially constant given opening angle as one another, and in phase with one another.Type: GrantFiled: August 14, 2019Date of Patent: October 18, 2022Assignee: STMicroelectronics LTDInventors: Eli Yaser, Guy Amor, Yotam Nachmias, Dadi Sharon, Sivan Nagola
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Patent number: 11477431Abstract: A method includes emitting a pattern of transmitted light into a three-dimensional environment from an optical transmitter and receiving reflected light from the pattern of transmitted light at an optical receiver. The method includes identifying light-sensitive pixels of that are stimulated by from the pattern of reflected light and generating an up-sampled matrix with subsections that correspond to light-sensitive pixels. The method includes sparsely populating subsections of the up-sampled matrix with a pattern of non-zero entries and imaging the three-dimensional environment.Type: GrantFiled: June 5, 2020Date of Patent: October 18, 2022Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITEDInventor: Andreas Assmann
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Patent number: 11471084Abstract: A method includes receiving a video signal that comprises a time series of images of a face of a human, wherein the images in the time series of images comprise a set of landmark points in the face, applying tracking processing to the video signal to reveal variations over time of at least one image parameter at the set of landmark points in the human face, generating a set of variation signals indicative of variations revealed at respective landmark points in the set of landmark points, applying processing to the set of variation signals, the processing comprising artificial neural network processing to produce a reconstructed PhotoPletysmoGraphy (PPG) signal, and estimating a heart rate variability of a variable heart rate of the human as a function of the reconstructed PPG signal.Type: GrantFiled: December 30, 2019Date of Patent: October 18, 2022Assignee: STMicroelectronics S.R.L.Inventors: Francesco Rundo, Francesca Trenta, Sabrina Conoci, Sebastiano Battiato
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Patent number: 11474621Abstract: An embodiment pointing method to generate screen-frame displacement data based on 3D-space movements of a pointing electronic device, comprises receiving a gravity vector (g), having components (gx, gy, gz) corresponding to respective projections of gravity acceleration ({right arrow over (g)}) on three axes (X, Y, Z) of a 3D reference system associated with the pointing electronic device, generated by a sensor-fusion algorithm from joint processing of an acceleration signal, indicative of acceleration acting on the pointing electronic device along the three axes, and of a gyroscope signal (Gyro), indicative of angular rate of rotation of the pointing electronic device around the three axes. The method further comprises implementing a roll-compensation of the gyroscope signal (Gyro) as a function of the gravity vector (g) to determine a roll-compensated gyroscope signal (Gyro?); and generating the screen-frame displacement data based on the roll-compensated gyroscope signal (Gyro?).Type: GrantFiled: July 17, 2020Date of Patent: October 18, 2022Assignee: STMICROELECTRONICS S.R.L.Inventors: Stefano Paolo Rivolta, Federico Rizzardini, Lorenzo Bracco
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Patent number: 11474546Abstract: A method is for operating an electronic device formed by a low dropout regulator (LDO) having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node. The electronic device is turned on by turning on the LDO, removing a DC bias from the second conduction terminal of the transistor by opening a first switch that selectively couples the second conduction terminal of the transistor to a supply node through a first diode coupled transistor and by opening a second switch that selectively couples the second conduction terminal of the transistor to a ground node through a second diode coupled transistor, and turning on the transistor. The electronic device is turned off by turning off the transistor, forming the DC bias at the second conduction terminal of the transistor, and turning off the LDO.Type: GrantFiled: September 4, 2020Date of Patent: October 18, 2022Assignee: STMicroelectronics International N.V.Inventors: Kapil Kumar Tyagi, Nitin Gupta
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Patent number: 11476845Abstract: A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.Type: GrantFiled: June 22, 2021Date of Patent: October 18, 2022Assignee: STMicroelectronics S.r.l.Inventors: Marco Giovanni Fontana, Marco Riva, Francesco Pulvirenti, Giuseppe Cantone
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Patent number: 11475960Abstract: An embodiment non-volatile memory device includes an array of memory cells in rows and columns; a plurality of local bitlines, the memory cells of each column being coupled to a corresponding local bitline; a plurality of main bitlines, each main bitline being coupleable to a corresponding subset of local bitlines; a plurality of program driver circuits, each having a corresponding output node and injecting a programming current in the corresponding output node, each output node coupleable to a corresponding subset of main bitlines. Each program driver circuit further includes a corresponding limiter circuit that is electrically coupled, for each main bitline of the corresponding subset, to a corresponding sense node whose voltage depends, during writing, on the voltage on the corresponding main bitline. Each limiter circuit turns off the corresponding programming current, in case the voltage on any of the corresponding sense nodes overcomes a reference voltage.Type: GrantFiled: May 3, 2021Date of Patent: October 18, 2022Assignees: STMicroelectronics International N.V., STMicroelectronics S.r.l.Inventors: Fabio Enrico Carlo Disegni, Laura Capecchi, Marcella Carissimi, Vikas Rana, Cesare Torti
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Patent number: 11474752Abstract: A processing system comprises a processing unit, a hardware block configured to change operation as a function of life cycle data, and a one-time programmable memory storing original life cycle data. A hardware configuration module is configured to read the original life cycle data from the one-time programmable memory, to store the original life cycle data in a register, to receive a write request from the processing unit, and to selectively execute the write request to overwrite the original life cycle data with new life cycle data in the register.Type: GrantFiled: July 17, 2020Date of Patent: October 18, 2022Assignee: STMicroelectronics Application GmbHInventor: Roberto Colombo
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Patent number: 11475238Abstract: An image processing system has one or more memories and image processing circuitry coupled to the one or more memories. The image processing circuitry, in operation, compares a first image to feature data in a comparison image space using a matching model. The comparing includes: unwarping keypoints in keypoint data of the first image; and comparing the unwarped keypoints and descriptor data associated with the first image to the feature data of the comparison image. The image processing circuitry determines whether the first image matches the comparison image based on the comparing.Type: GrantFiled: January 24, 2020Date of Patent: October 18, 2022Assignee: STMICROELECTRONICS S.r.l.Inventors: Arcangelo Ranieri Bruna, Danilo Pietro Pau
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Publication number: 20220329146Abstract: A first switch couples an input node receiving a main control signal for a main switching stage of a multi-phase converter to an output node delivering a secondary control signal for a secondary switching stage following actuation of the secondary switching stage. A second switch couples the output node to a capacitor during a time period of actuation/deactuation of the secondary switching stage. Current is sourced to the capacitor during the actuation time period or sunk from the capacitor during the deactuation time period. The sourced or sunk current may be generated proportional to the main control signal.Type: ApplicationFiled: June 28, 2022Publication date: October 13, 2022Applicant: STMicroelectronics S.r.l.Inventor: Alberto CATTANI
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Publication number: 20220329042Abstract: An input is coupled to a cathode of a laser diode having its anode coupled to a high-voltage-supply, with a cascoded current mirror having an input and output branches. The input branch is coupled between the high-voltage-supply and a sense resistor coupled to the input. The output branch is coupled between the high-voltage-supply and an output. A sense resistance is coupled between the output and ground, and includes a diode-coupled transistor coupled to the output and a resistor coupled between the diode-coupled transistor and ground. The input branch generates a current proportional to a voltage across the laser diode, and the output branch generates a mirrored current proportional to the current proportional to the voltage across the laser diode. A voltage proportional to the voltage across the laser diode is generated by the mirrored current flowing through the sense resistance. A comparison circuit compares this voltage to a threshold.Type: ApplicationFiled: June 28, 2022Publication date: October 13, 2022Applicants: STMicroelectronics S.r.l., POLITECNICO DI MILANOInventors: Marco ZAMPROGNO, Alireza TAJFAR