Patents Assigned to STMicroelectronics (Beijing) R&D Company Ltd.
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Patent number: 9424033Abstract: Apparatus and method for a modified, balanced throughput data-path architecture is given for efficiently implementing the digital signal processing algorithms of filtering, convolution and correlation in computer hardware, in which both data and coefficient buffers can be implemented as sliding windows. This architecture uses a multiplexer and a data path branch from the Address Generator unit to the multiply-accumulate execution unit. By selecting between the data path of Address Generator to execution unit and the data path of register to execution unit, the unbalanced throughput and multiply-accumulate bubble cycles caused by misaligned addressing on coefficients can be overcome. The modified balanced throughput data-path architecture can achieve a high multiply-accumulate operation rate per cycle in implementing digital signal processing algorithms.Type: GrantFiled: July 8, 2013Date of Patent: August 23, 2016Assignees: STMICROELECTRONICS (BEIJING) R&D COMPANY LTD., STMICROELECTRONICS S.R.L.Inventors: PengFei Zhu, HongXia Sun, YongQiang Wu, Elio Guidetti
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Patent number: 9082476Abstract: An apparatus and method are disclosed to implement digital signal processing operations involving multiply-accumulate (MAC) operations, by using a modified balanced data structure and accessing architecture. This architecture maintains a data-path connecting one address generation unit, one register file and one MAC execution unit. The register file has a hierarchical grouping organization of individual registers, which reduces bubble cycles caused by memory misalignments. This architecture uses parallel execution and can achieve two or more MAC operations per cycle.Type: GrantFiled: July 8, 2013Date of Patent: July 14, 2015Assignees: STMICROELECTRONICS (BEIJING) R&D COMPANY LTD., STMICROELECTRONICS S.R.L.Inventors: PengFei Zhu, HongXia Sun, YongQiang Wu, Elio Guidetti
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Patent number: 8514774Abstract: A method, and components for performing such method, is provided for synchronizing multiple user signals in a multi-user communication system. An interference matrix is generated based on time delay and frequency offset information for the active users accessing an OFDMA uplink receiver. User signals are received from the active users and are segmented into blocks, and the interference matrix is applied to each of the blocks. The received user signal is OFDM demodulated and un-used sub-carriers are discarded. Typically, the method includes also applying a factorization matrix formed by factoring a correction matrix created from the interference matrix and an inverse matrix formed based on the factoring results to the user signal blocks, e.g., the correction step includes multiplying each of the blocks from the user signal by each of these three matrices. The corrected user blocks are then concatenated to form a corrected vector signal.Type: GrantFiled: February 20, 2007Date of Patent: August 20, 2013Assignee: STMicroelectronics (Beijing) R&D Company Ltd.Inventors: Yiqun Ge, Wuxian Shi, Juan Du
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Patent number: 8488439Abstract: A blind carrier frequency offset estimator is based on a single-OFDM-symbol training sequence in multi-user OFDMA uplink. Through multiple access interference modeling and analysis, a virtual user is employed that occupies the all null sub-carriers. By minimizing the energy leakage on the virtual user in term of tentative frequency offsets, the estimator can approach the real frequency offset. The estimator performs only on frequency-domain, simplifies interference calculations, and lowers the rank of the matrix. An iterative computation method is used to approach the real frequency offset.Type: GrantFiled: May 25, 2010Date of Patent: July 16, 2013Assignee: STMicroelectronics (Beijing) R&D Company Ltd.Inventors: Yiqun Ge, Xutao Zhou, Wuxian Shi
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Publication number: 20130173865Abstract: A register file organization is used to support multiple accesses from more than one processor or pipeline. This shared register file is organized for a multiple processor device that includes a high performance (HP) and a low power (LP) core. The shared register file includes separate HP and LP storage units coupled to separate HP and LP write and read ports.Type: ApplicationFiled: December 3, 2012Publication date: July 4, 2013Applicants: STMICROELECTRONICS, S.R.L., STMICROELECTRONICS (BEIJING) R&D COMPANY LTD.Inventors: STMicroelectronics (Beijing) R&D Company Ltd., STMicroelectronics, s.r.l.
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Patent number: 8397148Abstract: A method for decoding tail-biting convolutional codes. The method includes initializing a correction depth, selecting a first starting state from a set of encoding states, and initializing a metric value for the selected starting state as zero and the other states as infinity. The input bit stream is read and a Search Depth Viterbi algorithm (SDVA) is performed to determine path metrics and identify a minimum-metric path. The ending state for the minimum-metric path is determined and the output for this ending state is identified as “previous output.” A second starting state is set to the ending state of the minimum-metric path, and symbols equal to the correction depth from the previous output are read. The SDVA is performed on the second set of read symbols to generate a corrected output. A decoded output is generated by replacing symbols at the beginning of the previous output with the corrected output.Type: GrantFiled: February 7, 2012Date of Patent: March 12, 2013Assignee: STMicroelectronics (Beijing) R&D Company Ltd.Inventors: Wuxian Shi, Juan Du, Yiqun Ge, Guobin Sun
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Publication number: 20120137198Abstract: A method for decoding tail-biting convolutional codes. The method includes initializing a correction depth, selecting a first starting state from a set of encoding states, and initializing a metric value for the selected starting state as zero and the other states as infinity. The input bit stream is read and a Search Depth Viterbi algorithm (SDVA) is performed to determine path metrics and identify a minimum-metric path. The ending state for the minimum-metric path is determined and the output for this ending state is identified as “previous output.” A second starting state is set to the ending state of the minimum-metric path, and symbols equal to the correction depth from the previous output are read. The SDVA is performed on the second set of read symbols to generate a corrected output. A decoded output is generated by replacing symbols at the beginning of the previous output with the corrected output.Type: ApplicationFiled: February 7, 2012Publication date: May 31, 2012Applicant: STMicroelectronics (Beijing) R&D Company Ltd.Inventors: Wuxian Shi, Juan Du, Yigun Ge, Guobin Sun
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Patent number: 8136023Abstract: A method for decoding tail-biting convolutional codes. The method includes initializing a correction depth, selecting a first starting state from a set of encoding states, and initializing a metric value for the selected starting state as zero and the other states as infinity. The input bit stream is read and a Search Depth Viterbi algorithm (SDVA) is performed to determine path metrics and identify a minimum-metric path. The ending state for the minimum-metric path is determined and the output for this ending state is identified as “previous output.” A second starting state is set to the ending state of the minimum-metric path, and symbols equal to the correction depth from the previous output are read. The SDVA is performed on the second set of read symbols to generate a corrected output. A decoded output is generated by replacing symbols at the beginning of the previous output with the corrected output.Type: GrantFiled: November 12, 2010Date of Patent: March 13, 2012Assignee: STMicroelectronics (Beijing) R&D Company Ltd.Inventors: Wuxian Shi, Juan Du, Yiqun Ge, Guobin Sun
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Publication number: 20110060972Abstract: A method for decoding tail-biting convolutional codes. The method includes initializing a correction depth, selecting a first starting state from a set of encoding states, and initializing a metric value for the selected starting state as zero and the other states as infinity. The input bit stream is read and a Search Depth Viterbi algorithm (SDVA) is performed to determine path metrics and identify a minimum-metric path. The ending state for the minimum-metric path is determined and the output for this ending state is identified as “previous output.” A second starting state is set to the ending state of the minimum-metric path, and symbols equal to the correction depth from the previous output are read. The SDVA is performed on the second set of read symbols to generate a corrected output. A decoded output is generated by replacing symbols at the beginning of the previous output with the corrected output.Type: ApplicationFiled: November 12, 2010Publication date: March 10, 2011Applicant: STMicroelectronics (Beijing) R&D Company Ltd.Inventors: Wuxian Shi, Juan Du, Yiqun Ge, Gobin Sun
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Patent number: 7742392Abstract: A blind carrier frequency offset estimator is based on a single-OFDM-symbol training sequence in multi-user OFDMA uplink. Through multiple access interference modeling and analysis, a virtual user is employed that occupies the all null sub-carriers. By minimizing the energy leakage on the virtual user in term of tentative frequency offsets, the estimator can approach the real frequency offset. The estimator performs only on frequency-domain, simplifies interference calculations, and lowers the rank of the matrix. An iterative computation method is used to approach the real frequency offset.Type: GrantFiled: August 2, 2007Date of Patent: June 22, 2010Assignee: STMicroelectronics (Beijing) R&D Company Ltd.Inventors: Yiqun Ge, Xutao Zhou, Wuxian Shi
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Publication number: 20070245209Abstract: A method for decoding tail-biting convolutional codes. The method includes initializing a correction depth, selecting a first starting state from a set of encoding states, and initializing a metric value for the selected starting state as zero and the other states as infinity. The input bit stream is read and a Search Depth Viterbi algorithm (SDVA) is performed to determine path metrics and identify a minimum-metric path. The ending state for the minimum-metric path is determined and the output for this ending state is identified as “previous output.” A second starting state is set to the ending state of the minimum-metric path, and symbols equal to the correction depth from the previous output are read. The SDVA is performed on the second set of read symbols to generate a corrected output. A decoded output is generated by replacing symbols at the beginning of the previous output with the corrected output.Type: ApplicationFiled: March 16, 2007Publication date: October 18, 2007Applicant: STMICROELECTRONICS (BEIJING) R&D COMPANY LTD.Inventors: Wuxian SHI, Juan DU, Yiqun GE, Guobin SUN
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Publication number: 20070202903Abstract: A method, and components for performing such method, is provided for synchronizing multiple user signals in a multi-user communication system. An interference matrix is generated based on time delay and frequency offset information for the active users accessing an OFDMA uplink receiver. User signals are received from the active users and are segmented into blocks, and the interference matrix is applied to each of the blocks. The received user signal is OFDM demodulated and un-used sub-carriers are discarded. Typically, the method includes also applying a factorization matrix formed by factoring a correction matrix created from the interference matrix and an inverse matrix formed based on the factoring results to the user signal blocks, e.g., the correction step includes multiplying each of the blocks from the user signal by each of these three matrices. The corrected user blocks are then concatenated to form a corrected vector signal.Type: ApplicationFiled: February 20, 2007Publication date: August 30, 2007Applicant: STMICROELECTRONICS (BEIJING) R&D COMPANY LTD.Inventors: Yiqun Ge, Wuxian Shi, Juan Du