Abstract: A continuous time sigma-delta analog-to-digital converter comprising: a summator of an input analog signal and a feedback signal; a feed-forward integrator path connected to the summator and configured to provide a digital signal; a feedback digital-to-analog converter to convert the digital signal into a feedback analog signal; a feedback low pass filter structured to filter the feedback analog signal and provide the feedback signal to the summator.

Abstract: A harmonic rejection mixer includes a differential in-phase signal path and a differential quadrature signal path, a shared differential transconductor for generating a shared transconductor output signal from a mixer input signal, a first selective mixing circuit disposed in the differential quadrature signal path and coupled to the shared differential transconductor, and a second selective mixing circuit disposed in the differential in-phase signal path and coupled to the shared differential transconductor, the first selective mixing circuit is controlled by a first selective control signal and the second selective mixing circuit is controlled by a second selective control signal to selectively supply the shared transconductor output signal to the differential quadrature signal path and the differential in-phase signal path, respectively.

Abstract: A loop filter having a first node on which to receive an input signal to the loop filter, a second node on which to provide an output signal of the loop filter, and a cascade arrangement of at least a first circuit that generates a zero, a second circuit that generates a first pole, and a third circuit that generates a second pole to form a passive loop filter of at least 3rd order. The cascade arrangement includes a first signal path coupling the first node to the second node, such that the first circuit is coupled to the first node through the second circuit and the third circuit. Further, the loop filter includes at least one transistor circuit, and a second signal path coupled in parallel to the first signal path at the first node and coupled to the second node through the transistor circuit.

Abstract: A harmonic rejection mixer for carrying out a frequency translation of a mixer input signal having a mixer input frequency, the mixer including an up-conversion mixer for generating an intermediate signal by multiplying the mixer input signal with a first local oscillation signal having a first local oscillation frequency, and a down-conversion mixer for generating a mixer output signal by multiplying the intermediate signal with a second local oscillation signal having a second local oscillation frequency. The first local oscillation frequency and the second local oscillation frequency are greater than the mixer input frequency. The first local oscillation signal is an l-time oversampled sine wave and the second local oscillation signal is an m-time oversampled sine wave.

Abstract: A frequency divider having a plurality of programmable latches connected in a feedback shift register configuration. A programmable latch of said plurality of latches comprises a program input to receive a program signal configured to select a polarity of the programmable latch among two opposite polarities. The frequency divider having a configuration module structured to provide at least the program signal to the program input to modify a divisor parameter of the frequency divider.

Abstract: An integrated circuit, comprises a wakeup terminal; a supply voltage terminal configured to receive a supply voltage; and a power control circuit. The power control circuit comprises an enable circuit coupled to the wakeup terminal and configured to generate a voltage monitoring enable signal as a response to a wakeup signal received at the wakeup terminal, and a voltage monitoring circuit for generating a supply voltage level indication signal. The voltage monitoring circuit is coupled to the supply voltage terminal and comprises an operation switch controlled by the voltage monitoring enable signal. The voltage monitoring circuit is configured to determine if the supply voltage is above a threshold voltage and set the supply voltage level indication signal accordingly. The integrated circuit further comprises processing circuitry, with the supply voltage level indication signal controlling the switching between a normal operation state and a standby state of the processing circuitry.

Abstract: A continuous time sigma-delta analog-to-digital converter comprising: a summator of an input analog signal and a feedback signal; a feed-forward integrator path connected to the summator and configured to provide a digital signal; a feedback digital-to-analog converter to convert the digital signal into a feedback analog signal; a feedback low pass filter structured to filter the feedback analog signal and provide the feedback signal to the summator.

Abstract: A first switching circuit has an input for receiving a first input signal, and a second switching circuit has an input for receiving a second input signal. A node is connected to receive outputs from both the first and second switching circuits. A filter receives an unfiltered signal from the node to generate an output signal. A circuit is provided to alternately actuate the first and second switching circuits during a transition time period so as to smoothly transition the output of the filter between the first and second input signals. At least one of the first and second input signals is a time-varying analog signal. The smooth transition between the first and second input signals has a shape determined by pulse width and frequency characteristics of pulses output by the circuit to alternately actuate the first and second switching circuits. The shape may include a linear ramp, an S-shaped curve, a parabolic curve and a hyperbolic curve.

Abstract: A circuit is provided for controlling a battery-charger device with a closed-loop architecture. The circuit includes sensing means for sensing an operative quantity of the device, control means, and driving means. The control means alternately controls the sensing means to track the operative quantity during a tracking phase and to hold the operative quantity during a holding phase. The driving means provides a regulation signal that regulates the operative quantity based on a comparison between the operative quantity sensed by the sensing means and a reference value. The control means causes the driving means to hold the regulation signal during at least part of each of the holding phases. Also provided is a method of controlling a battery-charger device with a closed-loop architecture.