Patents Assigned to STMicroelectronics N.V.
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Patent number: 6359926Abstract: A two-way multi-carrier transmission system, such as a DMT system. If there are dynamic changes in the transmission parameters, synchronization must be maintained between the transmitter and the receiver when the transmission parameters changed. The first stage of such a process requires that the changes of parameter be notified by one transceiver to others involved in an active communication process over a slow transmission channel such as the control channel. Subsequently, the synchronization transceiver is adjusted simultaneously, i.e., from a predetermined DMT symbol. Such adjustments in time synchronization must be achieved with a minimum of overhead.Type: GrantFiled: June 1, 1999Date of Patent: March 19, 2002Assignee: STMicroelectronics N.V.Inventors: Mikael Isaksson, Magnus Johansson, Harry Tonvall, Lennart Olsson, Tomas Stefansson, Hans Ohman, Gunnar Bahlenberg, Anders Isaksson, Goran Okvist, Lis-Marie Ljunggren, Tomas Nordstrom, Lars-Ake Isaksson, Daniel Bengtsson, Siwert Hakansson, Ye Wen
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Patent number: 6347017Abstract: The invention is a servo compensation method and system for use in a disk storage system. The disk storage system experiences error that causes a head to become mis-aligned with the disk. The error comprises multiple spin-frequency harmonic run-out error and other servo position errors. During follow mode, a digital filter processes a position error signal to generate a compensation signal. The position error signal is comprised of components representative of the multiple spin-frequency harmonic run-out error and the other servo position errors. The compensation signal is comprised of components that cause the servo positioning system to compensate for the multiple spin-frequency harmonic run-out error and the other servo position errors. The digital filter also operates as an oscillator that provides an oscillating signal at multiples of the spin frequency of the disk during seek mode.Type: GrantFiled: December 29, 1998Date of Patent: February 12, 2002Assignee: STMicroelectronics, N. V.Inventor: Lance Robert Carlson
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Publication number: 20020012384Abstract: A rake receiver uses a delayed version of the received sequence and a delayed version of a scrambling code. The flexible hardware structure of the time-aligning and descrambling unit includes at least two delay chains and one multiplier. By controlling two multiplexers, the delayed versions of the received sequence can be multiplied with an arbitrary scrambling code having an arbitrary phase. During one chip period, one multiplication is performed for each path to be processed.Type: ApplicationFiled: July 17, 2001Publication date: January 31, 2002Applicant: STMicroelectronics N.V.Inventor: Friedbert Berens
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Publication number: 20020012410Abstract: A first estimate is made of the impulse response of the channel considered as a whole, then this first estimate is corrected independently of the information transmitted for obtaining a corrected final estimate of the impulse response of the channel. This is done by taking account of the fact that the impulse response of the sender and the impulse response of the receiver are known.Type: ApplicationFiled: May 15, 2001Publication date: January 31, 2002Applicant: STMicroelectronics N.V.Inventor: David Chappaz
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Publication number: 20020010010Abstract: The electrical consumption of a cellular mobile telephone is reduced by using fractional-division phase-locked loops receiving a frequency reference from a fairly inaccurate quartz oscillator. Electrical consumption is also reduced by switching the output of the oscillator onto the input of the processing stage when the transmission/reception stage is inactive. The fractional-division phase-locked loops can then be deactivated.Type: ApplicationFiled: June 21, 2001Publication date: January 24, 2002Applicant: STMicroelectronics N.V.Inventors: Thierry Arnaud, Friedbert Berens
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Patent number: 6332205Abstract: A data recovery system wherein the data is represented by a sequence of data pulses comprising a predetermined sequence of preamble pulses followed by the sequence of data pulses. The data pulses have desired data pulses and a DC offset component, each one of such data pulses having during the preamble acquisition mode a predetermined period. The system includes a clock for producing clock pulses at a predetermined rate and a negative feedback loop. The negative feedback loop includes a differencing network fed by the data pulses and a feedback signal representative of the DC offset component. The differencing network removes the DC offset component from the data pulses to produce output signal representative of the desired data pulses.Type: GrantFiled: December 8, 1998Date of Patent: December 18, 2001Assignee: STMicroelectronics N.V.Inventor: Thomas Conway
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Patent number: 6320711Abstract: The invention provides a high-speed interface that transfers user data and other data over a single unified interface between a read channel integrated circuit and another integrated circuit, such as the drive control integrated circuit. The high-speed interface eliminates the need for analog pins on the integrated circuits to lower the cost of the system. The high-speed interface also eliminates the use of the serial interface to transfer the servo position data and other data which speeds up the data transfer. Examples of the other data include read channel settings, read channel performance data, and servo data. A read channel integrated circuit exchanges the user data with a data bus when the disk drive system is reading or writing the user data. The read channel integrated circuit exchanges the other data with the data bus when the disk drive system is reading servo data. The other integrated circuit exchanges the user data with the data bus when the disk drive system is reading or writing the user data.Type: GrantFiled: May 4, 1998Date of Patent: November 20, 2001Assignee: STMicroelectronics N.V.Inventor: John P. Hill
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Patent number: 6260169Abstract: Disclosed is a device for performing a header and row correction on rows of sector data that are read sequentially from a DVD medium. The device includes a pair of row buffers, a syndrome generator, and an error correction circuitry. The pair of row buffers sequentially receives and stores a current row of the sector data. When one buffer is receiving a next row of the sector data and is functioning as a receive buffer, the other buffer stores the current row of the sector data and functions as a correction buffer to be used in error correction. The syndrome generator receives the current row of the sector data and is configured to sequentially generate a row syndrome for the current row. The row syndrome is configured to indicates whether an error is present in the current row that is stored in the correction buffer. The error correction circuitry is coupled to the syndrome generator and is configured to receive the row syndrome associated with the current row that is stored in the correction buffer.Type: GrantFiled: March 31, 1998Date of Patent: July 10, 2001Assignee: STMicroelectronics N.V.Inventor: Firooz Massoudi
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Patent number: 6252736Abstract: A system for preventing crosstalk noise in a head of a drive for a reading data from and writing data to a magnetic media. The present invention includes circuitry that applies an intermediate current to a write element after a write operation is complete. The intermediate current causes the magnetic domains of the write element to go from a high energy state to an intermediate energy state before going to a low energy state. This reduces the magnetic pulses emitted from the write element.Type: GrantFiled: December 28, 1998Date of Patent: June 26, 2001Assignee: STMicroelectronics N.V.Inventor: Rodney A. L. Mattison
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Patent number: 6249395Abstract: A data recovery system wherein the data is represented by a sequence of preamble pulses having a predetermined sequence followed by data pulses. An analog to digital converter converts samples of the preamble pulses and the data pulses into corresponding digital words in response to clock pulses fed to a clock input of the converter. A pair of feedback loops is coupled to an output of the analog to digital converter to produce the clock pulses for the converter; a first one during a data recovery mode and a second one during a preceding preamble acquisition mode.Type: GrantFiled: December 8, 1998Date of Patent: June 19, 2001Assignee: STMicroelectronics, N.V.Inventor: Thomas Conway
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Patent number: 6229769Abstract: Disclosed is a disc drive system that includes a digital signal processor for processing information sectors read from a CD media. The digital signal processor is configured to parse the information sectors into data frames and subcode frames. A data auto-start unit for triggering a data transfer to a buffer memory when a desired data frame is detected. A subcode auto-start unit for triggering a subcode transfer to the buffer memory when a desired subcode frame is detected. Preferably, the desired data frame and the desired subcode frame have a same MSF. The disc drive system further includes a buffer manager having a plurality of counters that are configured to track the number of data frames and the number of subcode frames being transferred to the buffer memory, and releasing a block including one of the data frames and one of the subcode frames when the counters indicate that the block is complete.Type: GrantFiled: August 18, 1997Date of Patent: May 8, 2001Assignee: STMicroelectronics N.V.Inventor: John S Packer
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Patent number: 6175458Abstract: A disk drive processing system controls a Servo Timing Mark (STM) detection window in disk drive during a head switch operation. In response to the head switch operation, the system disables a timer that closes the STM detection window during normal operation, and the system tracks the elapsed time from a time point. The system compares the elapsed time to a programmable limit value. The system resumes normal operation if an STM is detected before the elapsed time reaches the programmable limit value and initiates a recovery procedure if the elapsed time reaches the programmable limit value. Advantageously, the programmable limit value can be easily re-programmed if a larger STM detection window is required due to severe STM or head mis-alignment.Type: GrantFiled: December 29, 1998Date of Patent: January 16, 2001Assignee: STMicroelectronics N.V.Inventor: Lance Robert Carlson
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Patent number: 6173430Abstract: Disclosed is a peripheral device for reliably detecting synchronization patterns in CD-ROM media. The peripheral device has an internal circuitry for controlling and processing data that is read from a medium of the peripheral device is disclosed. The peripheral device comprises a digital signal processor, a decoder circuit, and a state machine. The digital signal processor is configured to receive the data that is being read from the medium of the peripheral device. The decoder circuit is coupled to the digital signal processor and forms a part of the internal circuitry. Further, the decoder circuit includes an internal RAM that is configured to store a sector of the data including a current sync pattern and a next sync pattern. The state machine resides in the decoder for analyzing the current sync pattern and the next sync pattern of the sector of the data. In the analysis mode, the state code is configured to determine whether a fatal error is present in the data.Type: GrantFiled: February 13, 1998Date of Patent: January 9, 2001Assignee: STMicroelectronics, N.V.Inventor: Firooz Massoudi
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Patent number: 6169456Abstract: In accordance with the present invention, an auto-biased cascode current circuit capable of improved range in headroom is disclosed. In one embodiment, the current circuit includes a current mirror and a bias circuit, where the current mirror contains a reference leg and an output leg. A reference current flows within the reference leg. Included in the output leg is an output terminal, a first output transistor and a second output transistor. The output terminal operates at an output potential. The bias circuit regulates the reference leg of the current mirror such that the output potential is substantially equal to a drain-to-source saturation voltage of the first output transistor plus a drain-to-source saturation voltage of the second output transistor plus a predetermined overdrive voltage. The predetermined overdrive voltage is a design parameter which is less than a threshold voltage.Type: GrantFiled: January 6, 1999Date of Patent: January 2, 2001Assignee: STMicroelectronics N.V.Inventor: Gregory W. Pauls
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Patent number: 6163424Abstract: A method and apparatus for performing head switch operations in a magnetic disk system having a magnetic disk device that is segmented into a plurality of cylinders, which cylinders are grouped into an inner zone, a middle zone, and an outer zone. The inner zone is near the innermost area of the magnetic disk device. The outer zone is near the outermost area of the magnetic disk device. The middle zone is in between the inner zone and the outer zone. The head switch is performed from a current head to a target head. Prior to the head switch, the system determines if the current cylinder is in either the inner zone or the outer zone. When the current cylinder is in either the inner zone or the outer zone, the system seeks the current head to the middle zone, whereupon the system performs a head switch from the current head to the target head. When the current cylinder is not found to be in either the inner zone or the outer zone, i.e.Type: GrantFiled: October 28, 1999Date of Patent: December 19, 2000Assignee: STMicroelectronics, N.V.Inventors: Lance Robert Carlson, Aaron Wade Wilson
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Patent number: 6163814Abstract: The invention provides a high-speed interface that transfers servo position data from the read channel integrated circuit to the drive control integrated circuit or another integrated circuit. The high-speed interface eliminates the need for analog pins on the integrated circuits to lower the cost of the system. The high-speed interface also eliminates the use of the serial interface to transfer the servo position data which speeds up the data transfer. Examples of servo position data include high-resolution servo position data and coarse-resolution servo position data. A read channel integrated circuit transfers the user data and the high-resolution servo position data to a data bus, such as an NRZ bus. The data bus transfers the user data and the high-resolution servo position data to another integrated circuit, such as a drive control integrated circuit. The other integrated circuit receives the user data and the high-resolution servo position data from the data bus.Type: GrantFiled: February 20, 1998Date of Patent: December 19, 2000Assignee: STMicroelectronics N.V.Inventor: John P. Hill
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Patent number: 6131138Abstract: The present invention provides an improved disc drive. In one embodiment of the present invention a disc drive capable of spinning a disc, which contains more than one type of data is disclosed. A first type of data is associated with a first speed, and a second type of data is associated with a second speed that is faster than the first speed. The disc drive includes a drive mechanism, which may spin the compact disc at the first and second speeds and retrieve data from the compact disc at either speed. The disc drive also includes an elastic buffer, which is in communication with the drive mechanism. The buffer receives data from the drive mechanism at a variable input data rate and outputs data at a variable output data rate. Whereby when the drive mechanism spins the compact disc at the second speed the buffer may receive the first type of data without causing the drive mechanism to slow down to the first speed, and the buffer may output the first type of data at the variable output data rate.Type: GrantFiled: August 18, 1997Date of Patent: October 10, 2000Assignee: STMicroelectronics N.V.Inventors: John S. Packer, Steven D. Wilson
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Patent number: 6119254Abstract: A method of testing a processor controlled chip having embedded circuitry devoid of a direct connection external to said chip. Tracing circuitry embedded on the chip is programmed to detect the presence of specified information on a bus system embedded on the chip and devoid of a direct connection external to the chip. An address comparator detects the presence of the specified information on the bus system and opens gating circuitry in response to the detection. The specified information is extended through the gating circuitry and written in a buffer memory. The specified information can be read out of the buffer memory and extended to a user terminal external to the chip.Type: GrantFiled: December 23, 1997Date of Patent: September 12, 2000Assignee: STMicroelectronics, N.V.Inventors: Nicolas C. Assouad, David L. Dyer, Wen Lin
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Patent number: 6097563Abstract: A method and apparatus for performing head switch operations in a magnetic disk system with a magnetic disk device that is segmented into a plurality of cylinders. The cylinders are grouped into an inner zone, a middle zone, and an outer zone. The inner zone is near the innermost area of the magnetic disk device. The outer zone is near the outermost area of the magnetic disk device. The middle zone is in between the inner zone and the outer zone. The head switch is performed from a current head at a current cylinder to a target head at a target cylinder. Prior to the head switch, the system determines if the current cylinder is in either the inner zone or the outer zone. If the current cylinder is in either the inner zone or the outer zone, then the system determines if the target cylinder is in either the inner zone or the outer zone. If the target cylinder is in either the inner zone or the outer zone, then the system seeks the current head to the middle zone and then performs the head switch.Type: GrantFiled: December 19, 1997Date of Patent: August 1, 2000Assignee: STMicroelectronics N.V.Inventors: Lance Robert Carlson, Aaron Wade Wilson
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Patent number: 6098185Abstract: A method and data structure for a header-formatted defective sector management system. A spare sector is allocated for each n sectors. When a defective one of the n sectors is identified, the sectors are slipped using the spare sector. The location of the defective sector and the type of defect, e.g., data field or header field, is indicated by a data structure written to the header field of at least one of the non-defective sectors. When a second defective sector is identified, the system operates to disposition the second defective sector based on the type of the first defective sector. If the first defective sector was a defect in the data field and the second defective sector is a defect in the header field then the first defective sector is converted to a reassigned sector and the second defective sector is slipped. This avoids the problem of reassigning a sector having a defective header field.Type: GrantFiled: October 31, 1997Date of Patent: August 1, 2000Assignee: STMicroelectronics, N.V.Inventor: Aaron W. Wilson