Abstract: A current monitoring circuit includes: an output terminal configured to be coupled to a controller; an inverter having an output coupled to the output terminal; a first transconductance amplifier having first and second inputs configured to be coupled across a sense resistive element, and an output coupled to an input of the inverter; and a current generator having a second transconductance amplifier configured to generate a reference current at an output of the current generator based on a reference voltage, the output of the current generator being coupled to the input of the inverter, where the output of the inverter is configured to be in a first state when a load current flowing through the sense resistive element is higher than a predetermined threshold, and in a second state when the load current is lower than the predetermined threshold, and where the predetermined threshold is based on the reference current.

Abstract: A method of manufacturing an electronic module includes providing a base substrate having a first surface, providing a first supporting element having a first portion with an inclined top surface, and affixing the first supporting element to the first surface such that the inclined top surface is inclined with respect to the base substrate. A first reflector is coupled to the inclined top surface such that a rear surface of the first reflector is in physical contact with the inclined top surface of the first portion of the first supporting element, and a spacer structure is configured to form an interface for mounting lateral walls to the base substrate. A cap is positioned over and supported by the lateral walls to thereby define a chamber. The emitter, as well as a detector, are coupled to the first surface of the base substrate.

Abstract: In an embodiment, a system includes a slave circuit configured to receive an external clock signal from a master circuit, the slave circuit comprising first and second peripherals configured to receive respective clock signals obtained from the external clock signal, wherein the master circuit is configured to send to the slave circuit the external clock signal according to two different timing modes, wherein the slave circuit comprises a logic circuit configured to provide a locking signal to the first peripheral circuit when the logic circuit detects a given operating mode of the slave circuit, wherein the master circuit is configured to send the external clock signal according to a first timing mode before receipt of the locking signal, and wherein the master circuit is configured, following upon receipt of the locking signal, to send the external clock signal according to a second timing mode different from the first timing mode.

Abstract: A MEMS device comprising a body, having a first surface and a second surface; a diaphragm cavity in the body extending from the second surface of the body; a deformable portion in the body between the first surface and the diaphragm cavity; and a piezoelectric actuator, extending on the first surface of the body, over the deformable portion. The MEMS device is characterized in that it comprises a recess structure extending in the body and delimiting a stopper portion for the deformable portion.

Abstract: A multi-level pulser circuit comprises a set of first input pins for receiving respective positive voltage signals at different voltage levels, a set of second input pins for receiving respective negative voltage signals at different voltage levels, and a reference input pin configured to receive a reference voltage signal intermediate the positive voltage signals and the negative voltage signals. The circuit comprises an output pin configured to supply a pulsed output signal. The circuit further comprises control circuitry configured to selectively couple the output pin to one of the first input pins, the second input pins and the reference input pin to generate the pulsed output signal at the output pin.

Abstract: A memory array arranged as a plurality of memory cells. The memory cells are configured to operate at a determined voltage. A memory management circuitry coupled to the plurality of memory cells tags a first set of the plurality of memory cells as low-voltage cells and tags a second set of the plurality of memory cells as high-voltage cells. A power source provides a low voltage to the first set of memory cells and provides a high voltage to the second set of memory cells based on the tags.

Abstract: The present disclosure is directed to a device and method for detecting presence or absence of human speech. The device and method utilize a low-power accelerometer. The device and method generate an acceleration signal using the accelerometer, filter the acceleration signal with a band pass filter or a high pass filter, determine at least one calculation of the filtered acceleration signal, detect a presence or absence of a voice based on the at least one calculation, and output a detection signal that indicates the presence or absence of the voice. The device and method are well suited for portable audio devices, such as true wireless stereo headphones, that have a limited power supply.

Abstract: In a digital communication system, a master device and a number of slave devices are coupled in communication with the master device over a shared data communication bus. A selection line for each one of the slave devices couples the master device with a respective slave device and is dedicated to selection by the master device of the respective slave device for communication over the shared data communication bus. Each of the slave devices is able to send an interrupt request to the master device over the respective selection line to be served by the master device initiating a communication over the shared data communication bus, each selection line thereby being a bidirectional communication line between the respective slave device and the master device.

Abstract: An electronic device has an input which, in operation, receives an input stream of accelerometer data samples indicative of acceleration values along at least one axis. The devices includes circuitry, coupled to the input. The circuitry, in operation, executes an automatic-learning algorithm on blocks of samples of the input stream of accelerometer data samples to identify, for each block, a corresponding condition-of-user-movement from among a plurality of determined conditions-of-user-movement. The circuitry generates a plurality of streams of samples based on the input stream of accelerometer data samples, and for each condition of movement identified, selects a corresponding stream of samples of the plurality of streams of samples. The circuitry executes a wrist-tilt gesture detection algorithm using samples of the selected stream of the plurality of streams of samples.

Abstract: A bridge driver circuit applies a bias voltage across first and second input nodes of a resistive bridge circuit configured to measure a physical property such as pressure or movement. A sensing circuit senses drive current, bias current and common mode current for the bridge driver and sums the sensed currents to generate a source current. The source current is processed to determine a normalized resistance and temperature of the resistive bridge circuit and from which a temperature dependent sensitivity of the resistive bridge circuit is determined. A voltage output at first and second output nodes of the resistive bridge circuit is processed to determine a value of the physical property. This processing further involves applying a temperature correction in response to the determined temperature dependent sensitivity.

Abstract: A voltage supply circuit and a method for controlling a voltage supply circuit are provided. The voltage supply circuit includes a positive charge pump stage that generates a positive voltage and a negative charge pump stage that generates a negative voltage. The voltage supply circuit also includes a control stage that compares a voltage representative of the negative voltage with a reference voltage and causes a slope of the positive voltage to decrease when the voltage representative of the negative voltage exceeds the reference voltage.

Abstract: The disclosure relates to a scan chain circuit comprising cascaded flip-flops having a functional input node and a test input node configured to be selectively coupled to logic circuitry at a clock edge time. A clock line is provided configured to distribute one or more clock signals to the flip-flops in the chain, wherein the flip-flops in the chain have active clock edges applied thereto at respective clock edge times. The chain of flip-flops comprise a set of flip-flops configured to receive an edge inversion signal and to selectively invert their active clock edges in response to the edge inversion signal being asserted.

Abstract: A circuit for startup of a multi-stage amplifier circuit includes a pair of input nodes and at least two output nodes configured to be coupled to a multi-stage amplifier circuit. A startup differential stage includes a differential pair of transistors having respective control terminals coupled to the pair of input nodes, and each transistor in the differential pair of transistors has a respective current path therethrough between a respective output node and a common source terminal. The startup differential stage is configured to sense a common mode voltage drop at a first differential stage of the multi-stage amplifier circuit. Current mirror circuitry includes a plurality of transistors coupled to the common terminal of the differential pair of transistors and coupled to two output nodes of the at least two output nodes.

Abstract: A control circuit operates to control a switching stage of an electronic converter. The control circuit includes: first terminals providing drive signals to electronic switches of the switching stage; a second terminal receiving from a feedback circuit a first feedback signal proportional to a converter output voltage; and a third terminal configured to receive from a current sensor a second feedback signal proportional to an inductor current. A driver circuit provides the drive signals as a function of a PWM signal generated by a generator circuit as a function of the first and second feedback signals, a reference voltage and a slope compensation signal. A mode selection signal is generated as a function of a comparison between the input voltage and the output voltage. A feed-forward compensation circuit is configured to source and/or sink a compensation current as a function of a variation in the mode selection signal.

Abstract: A microcontroller includes an input pin and internal pull-up and pull-down circuits. External pull-up and pull-down circuits are also coupled to the input pin. The microcontroller is operable according to different configuration modes which include configuring the input pin in a floating state. A control logic then configures the internal pull-up and pull-down circuits according to an internal pull-up mode to acquire a first input voltage signal (at a first logic value) from the input pin, and further configure the internal pull-up and pull-down circuits according to an internal pull-down mode to acquire a second input voltage signal (at a second logic value) from the input pin. A selection of the operating mode of the MCU is then made based on the acquired first and second logic values.

Abstract: A vertical-conduction MOSFET device formed in a body of silicon carbide having a first and a second face and a peripheral zone. A drain region, of a first conductivity type, extends in the body between the two faces. A body region, of a second conductivity type, extends in the body from the first face, and a source region, having the first conductivity type, extends to the inside of the body region from the first face of the body. An insulated gate region extends on the first face of the body and comprises a gate conductive region. An annular connection region, of conductive material, is formed within a surface edge structure extending on the first face of the body, in the peripheral zone. The gate conductive region and the annular connection region are formed by a silicon layer and by a metal silicide layer overlying the silicon layer.

Abstract: A level-shifter includes an input node coupled to a laser driver input receiving a trigger signal, the input node receiving a signal indicating generation of a laser drive-pulse. A p-channel transistor has a source coupled to a supply node, a drain coupled to an output node, and a gate coupled to the input node. An n-channel transistor has a drain coupled to the drain of the p-channel transistor, a source coupled to ground, and a gate coupled to the input node. A first switch couples the input node to the output node. Another p-channel transistor has a source coupled to the supply node, a drain coupled to the output node by a second switch, and a gate coupled to the input node. The first switch closes and second switch opens when the signal is low, and the first switch opens and second switch closes when the signal is high.

Abstract: In an embodiment, a brown-out protection circuit includes: a monitoring terminal; a threshold generator supplying a threshold voltage; a comparator to compare a monitoring voltage at the monitoring terminal and the threshold voltage; and a logic module supplying an enable signal having a brown-in logic value and a brown-out logic value. When the enable signal is at the brown-out logic value, the logic module checks transition conditions, relating to a number of usable transitions of the monitoring voltage from lower to greater than the threshold voltage, and time conditions, relating to permanence of the monitoring voltage above the threshold voltage after a usable transition or in an aggregated manner after a plurality of consecutive usable transitions. The logic module sets the enable signal to the brown-in logic value when the transition conditions or the time conditions are met.

Abstract: A merged-PN-Schottky, MPS, diode includes an N substrate, an N-drift layer, a P-doped region in the drift layer, an ohmic contact on the P-doped region, a plurality of cells within the P-doped region and being portions of the drift layer where the P-doped region is absent, an anode metallization on the ohmic contact and on said cells, to form junction-barrier contacts and Schottky contacts respectively. The P-doped region has a grid-shaped layout separating from one another each cell and defining, together with the cells, an active area of the MPS diode. Each cell has a same geometry among quadrangular, quadrangular with rounded corners and circular; and the ohmic contact extends at the doped region with continuity along the grid-shaped layout.

Abstract: An actuation structure of a MEMS electroacoustic transducer is formed in a die of semiconductor material having a monolithic body with a front surface and a rear surface extending in a horizontal plane x-y plane and defined in which are: a frame; an actuator element arranged in a central opening defined by the frame; cantilever elements, coupled at the front surface between the actuator element and the frame; and piezoelectric regions arranged on the cantilever elements and configured to be biased to cause a deformation of the cantilever elements by the piezoelectric effect. A first stopper arrangement is integrated in the die and configured to interact with the cantilever elements to limit a movement thereof in a first direction of a vertical axis orthogonal to the horizontal plane, x-y plane towards the underlying central opening.