Abstract: A circuit for comparing a voltage with a threshold, including: first and second nodes of application of the voltage; a first branch including a first transistor series-connected with a first resistor between first and second nodes; a second branch parallel to the first branch, including second and third series-connected resistors forming a voltage dividing bridge between the first and second nodes, the midpoint of the dividing bridge being connected to a control node of the first transistor; and a third branch including a second transistor in series with a resistive and/or capacitive element, between the control node of the first transistor and the first or second node, a control node of the second transistor being connected to the junction point of the first transistor and of the first resistor.

Abstract: A method to estimate parameters of a system to spread a spectrum of a first periodic signal according to a modulation period. An embodiment comprises sampling the first signal using a second periodic signal, determining based on the sampling result each occurrence where the first and second signals are synchronous, incrementing a first counter at each sampling, the first counter being reset at each said occurrence, storing at each said occurrence the last value of the first counter before the resetting, providing a third periodic signal at a first level when said last value is greater than a threshold and at a second level when said last value is smaller than the threshold, and determining the modulation period based on the period of the third signal.

Abstract: Ambient light is detected by a photodiode circuit by measuring the time taken for a digital output of the photodiode circuit to change state in response to exposure of a photodiode of the photodiode circuit to that ambient light. A nominal time for state change is calculated based on photodiode circuit characteristics. Furthermore, an effective time for the photodiode circuit digital output to change state is determined in a calibration mode where the photodiode has been disconnected and a reference current is applied to the circuit. An illumination value of the detected ambient light is then calculated as a function of: the measured time, the effective time and the nominal time.

Abstract: The present invention relates to an integrated electronic circuit including elements enabling to implement a logic function and means for attenuating the sensitivity of said elements to external disturbances, said attenuation means being disconnectable during phases of intentional modification of the state of said elements.

Abstract: A method for determining, by means of a computer, a photolithography mask for the manufacturing a microstructure by grey level etching of a resist layer, this mask including a plurality of elementary cells, each including an opaque area arranged, in top view, in a non-peripheral portion of a transparent region or, conversely, in a transparent area arranged, in top view, in a non-peripheral portion of an opaque region, comprising the steps of: a) initializing the mask pattern in a first state; b) determining, by simulation, the profile of the microstructure which would result from the use of the mask according to said pattern; c) adjusting said pattern by modifying, in certain cells, the position of the opaque or transparent area within the cell; and d) forming the mask according to said pattern.

Abstract: Ambient light is detected by a photodiode circuit by measuring the time taken for a digital output of the photodiode circuit to change state in response to exposure of a photodiode of the photodiode circuit to that ambient light. A nominal time for state change is calculated based on photodiode circuit characteristics. Furthermore, an effective time for the photodiode circuit digital output to change state is determined in a calibration mode where the photodiode has been disconnected and a reference current is applied to the circuit. An illumination value of the detected ambient light is then calculated as a function of: the measured time, the effective time and the nominal time.

Abstract: An amplifier having at least one switch controlled by an output voltage of a hysteresis block, wherein the hysteresis block is adapted to receive an input voltage signal based on an integration of an error signal, a low threshold voltage and a high threshold voltage, and is arranged to change the output voltage from a first value to a second value when the input voltage signal is higher than the high threshold voltage and to change the output voltage from the second value to the first value when the input voltage signal is lower than the low threshold voltage, and wherein the low threshold voltage is equal to Vref??VDD and the high threshold voltage is equal to Vref+?VDD, where Vref is a common mode voltage level, ? is a non-zero constant, and VDD is a power supply voltage.

Abstract: An amplifier comprises: first and second supply terminals intended to receive a DC supply voltage; a first branch coupled between the first and second supply terminals and including a first terminal of application of a differential signal to be amplified; a second branch coupled between the first and second supply terminals and including a second terminal of application of the differential signal to be amplified; a third branch coupled between the first and second supply terminals and including a first amplifier having an input terminal connected to the second branch and having an output terminal configured to be coupled to a load, and a measurement element configured to measure a current in the third branch; and a fourth branch coupled between the first and second supply terminals and including a second amplifier having an input terminal connected to the first branch, and a copying element configured to copy the current measured in the third branch.

Abstract: An integrated circuit (IC) includes at least one capacitor with metal electrodes. At least one of the electrodes (10 or 30) is formed from at least surface-silicided hemispherical grain silicon or silicon alloy. A fabrication process for obtaining such a capacitor with silicided metal electrodes is also provided.

Abstract: The invention relates to a decoding device particularly adapted to decode a digital input signal (E) in a transmission system using direct sequence spread spectrum, this digital input signal (E) being composed of symbols, each symbol representing a bit satisfying a Barker code, and comprising several symbol elements. This device comprises several finite response filters (FLT1 to FLT4) each of which receives the digital input signal (E), a clock circuit (CLK_GEN) outputting clock signals (CLK1 to CLK4) to the filters with a frequency equal to the frequency at which symbol elements are produced and uniformly distributed phase shifts, and an analysis circuit (ANL) designed to identify which of the filters is best tuned to the input signal (E) and to control the clock circuit to make it generated a clock signal (CLK5) optimised for decoding and an analysis circuit.

Abstract: A non-volatile memory point including a floating gate placed above a semiconductor substrate, the floating gate comprising active portions insulated from the substrate by thin insulating layers, and inactive portions insulated from the substrate by thick insulating layers that do not conduct electrons, the active portions being principally P-type doped, and the inactive portions comprising at least one N-type doped area forming a portion of a PN junction.

Abstract: A method for loading a semiconductor wafer into a process unit comprises opening the process unit, inserting a wafer into the process unit, adjusting the position of the wafer in the process unit so that it is in a certain position in relation to markers, and inserting a camera into the process unit facing the markers. The camera acquires an image of the markers and of a part of the wafer, and displays on a display screen the image acquired. The position of the wafer is adjusted according to the position of the wafer in relation to the markers on the image displayed.

Abstract: An oscillator is provided that includes an oscillating structure generating an output signal with a frequency that drifts as a function of a parameter of its environment, and a compensation circuit coupled to the oscillating structure. The oscillating structure has a ring structure that includes delay cells looped together, and the compensation circuit supplies a compensation signal to the oscillating structure. The compensation signal varies as a function of changes in the parameter in order to compensate for the drift in the frequency of the generated signal. This makes it possible to compensate for oscillator temperature drifts in the absence of a regulation loop.

Abstract: An amplifier comprises: first and second supply terminals intended to receive a DC supply voltage; a first branch coupled between the first and second supply terminals and including a first terminal of application of a differential signal to be amplified; a second branch coupled between the first and second supply terminals and including a second terminal of application of the differential signal to be amplified; a third branch coupled between the first and second supply terminals and including a first amplifier having an input terminal connected to the second branch and having an output terminal configured to be coupled to a load, and a measurement element configured to measure a current in the third branch; and a fourth branch coupled between the first and second supply terminals and including a second amplifier having an input terminal connected to the first branch, and a copying element configured to copy the current measured in the third branch.

Abstract: A transistor structure comprises a semiconductor element extending between a source zone and a drain zone, as well as three portions of gates disposed on different sides of the semiconductor element. Such a structure is especially compact and may be used as two or three transistors having independent respective functions. In particular, the structure may be used as a combination of a transistor with a logic or analog function, with one or two random access memory cells.

Abstract: The invention relates to a decoding device particularly adapted to decode a digital input signal (E) in a transmission system using direct sequence spread spectrum, this digital input signal (E) being composed of symbols, each symbol representing a bit satisfying a Barker code, and comprising several symbol elements. This device comprises several finite response filters (FLT1 to FLT4) each of which receives the digital input signal (E), a clock circuit (CLK_GEN) outputting clock signals (CLK1 to CLK4) to the filters with a frequency equal to the frequency at which symbol elements are produced and uniformly distributed phase shifts, and an analysis circuit (ANL) designed to identify which of the filters is best tuned to the input signal (E) and to control the clock circuit to make it generated a clock signal (CLK5) optimised for decoding and an analysis circuit.

Abstract: There is provided a detector for extracting binary data frequency-modulated on a carrier signal. An axes generator produces M pairs of logic signals, the logic signals of the same pair being in quadrature. The decoder includes M asynchronous logic zero-crossing detectors producing first pulses and second pulses. An up-counter/down-counter has first, second and third values, and when it has the second value, passing to the first value during a first pulse, and passing to the third value during a second pulse, and a binary decoder generates binary data whose state is not modified when the up-counter/down-counter passes from the first value to the second value or from the third value to the second value. No external time base is required and the decoder has a reduced bit error ratio.

Abstract: An oscillator is provided that includes an oscillating structure generating an output signal with a frequency that drifts as a function of a parameter of its environment, and a compensation circuit coupled to the oscillating structure. The oscillating structure has a ring structure that includes delay cells looped together, and the compensation circuit supplies a compensation signal to the oscillating structure. The compensation signal varies as a function of changes in the parameter in order to compensate for the drift in the frequency of the generated signal. This makes it possible to compensate for oscillator temperature drifts in the absence of a regulation loop.