Abstract: A receiver is described for a testing device for a data stream in which the data stream comprises a plurality of encoded data components. The receiver comprises an input for inputting a plurality of encoded data components, a processor for processing the plurality of encoded data components; and a plurality of outputs each for outputting a processed one of the plurality of encoded data components. The receiver is arranged, such that, in use, a plurality of encoded data components received at the input are processed by the processor and a processed one of the plurality of encoded data components is output from one of the plurality of outputs. This arrangement provides computational efficiency.

Abstract: A receiver is described for a testing device for a data stream in which the data stream comprises a plurality of encoded data components. The receiver comprises an input for inputting a plurality of encoded data components, a processor for processing the plurality of encoded data components; and a plurality of outputs each for outputting a processed one of the plurality of encoded data components. The receiver is arranged, such that, in use, a plurality of encoded data components received at the input are processed by the processor and a processed one of the plurality of encoded data components is output from one of the plurality of outputs.

Abstract: A receiver is described for a testing device for a data stream in which the data stream comprises a plurality of encoded data components. The receiver comprises an input for inputting a plurality of encoded data components, a processor for processing the plurality of encoded data components; and a plurality of outputs each for outputting a processed one of the plurality of encoded data components. The receiver is arranged, such that, in use, a plurality of encoded data components received at the input are processed by the processor and a processed one of the plurality of encoded data components is output from one of the plurality of outputs.