Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.
Type:
Grant
Filed:
October 22, 2018
Date of Patent:
March 1, 2022
Assignee:
Stratio Inc.
Inventors:
Jae Hyung Lee, Yeul Na, Youngsik Kim, Woo-Shik Jung
Abstract: Methods for reducing surface roughness of germanium are described herein. In some embodiments, the surface roughness is reduced by thermal oxidation of germanium. In some embodiments, the surface roughness is further reduced by controlling a rate of the thermal oxidation. In some embodiments, the surface roughness is reduced by thermal annealing.
Type:
Grant
Filed:
June 15, 2017
Date of Patent:
March 24, 2020
Assignee:
Stratio, Inc.
Inventors:
Woo-Shik Jung, Yeul Na, Youngsik Kim, Jae Hyung Lee, Jin Hyung Lee
Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.
Type:
Grant
Filed:
December 11, 2015
Date of Patent:
October 23, 2018
Assignee:
Stratio, Inc.
Inventors:
Jae Hyung Lee, Yeul Na, Youngsik Kim, Woo-Shik Jung
Abstract: A method for removing nuclei formed during a selective epitaxial growth process includes epitaxially growing a first group of one or more semiconductor structures over a substrate with one or more mask layers. A second group of a plurality of semiconductor structures is formed on the one or more mask layers. The method also includes forming one or more protective layers over the first group of one or more semiconductor structures. At least a subset of the second group of the plurality of semiconductor structures is exposed from the one or more protective layers. The method further includes, subsequent to forming the one or more protective layers over the first group of one or more semiconductor structures, etching at least the subset of the second group of the plurality of semiconductor structures.
Type:
Grant
Filed:
February 23, 2016
Date of Patent:
June 28, 2016
Assignees:
STRATIO, STRATIO INC.
Inventors:
Jae Hyung Lee, Youngsik Kim, Yeul Na, Woo-Shik Jung