Patents Assigned to SULVOLTA, INC.
  • Publication number: 20120139051
    Abstract: A planar transistor with improved performance has a source and a drain on a semiconductor substrate that includes a substantially undoped channel extending between the source and the drain. A gate is positioned over the substantially undoped channel on the substrate. Implanted source/drain extensions contact the source and the drain, with the implanted source/drain extensions having a dopant concentration of less than about 1×1019 atoms/cm3, or alternatively, less than one-quarter the dopant concentration of the source and the drain.
    Type: Application
    Filed: December 3, 2010
    Publication date: June 7, 2012
    Applicant: SULVOLTA, INC.
    Inventors: Pushkar Ranade, Lucian Shifren, Sachin R. Sonkusale