Patents Assigned to Sumitomo Electronic Industries, Ltd.
  • Publication number: 20240146255
    Abstract: An amplifier includes a first amplifier amplifying first signal, a first matching circuit having first end connected to output node of first amplifier, and second end connected to first intermediate node, and a first transmission line having first end connected to first intermediate node, and second end connected to first output node. At a center frequency of an operating band, a first reactance component of impedance seen from first output node toward first transmission line is smaller than a second reactance component of impedance seen from first intermediate node toward first matching circuit, and at the center frequency, a first characteristic impedance of first transmission line is 0.5 to 2 times an absolute value of first impedance seen from second end of first matching circuit toward first matching circuit when first and second ends of first matching circuit are terminated to reference impedance.
    Type: Application
    Filed: October 20, 2023
    Publication date: May 2, 2024
    Applicant: Sumitomo Electronic Industries, Ltd.
    Inventor: Takashi SUMIYOSHI
  • Publication number: 20190391332
    Abstract: A spot-size converter includes: a support body that includes a main surface including a first to a fifth areas; a mesa structure that includes a first part on the first area and includes a second part on the second to the fourth areas; and an embedding structure that includes a first region and a second region in which a first and a second side-surfaces of the second part of the mesa structure are respectively embedded. The second part of the mesa structure includes a portion that has a width gradually decreasing in a direction from the third area toward the fifth area. The first region of the embedding structure extends along the first side-surface and terminates at one of the third and the fourth areas. The second region of the embedding structure extends along the second side-surface of the second part and is disposed on the fifth area.
    Type: Application
    Filed: June 19, 2019
    Publication date: December 26, 2019
    Applicant: SUMITOMO ELECTRONIC INDUSTRIES, LTD.
    Inventors: Naoya Kono, Takuo Hiratani, Masataka Watanabe
  • Publication number: 20160156165
    Abstract: It is aimed to provide a technology capable of partially easily bending and deforming a wiring harness accommodated in a protector without introducing a hot-pressing machine for forming a shape capable of accommodating a wiring harness at a manufacturing side for wiring harnesses. To achieve this object, a protector includes an accommodating portion formed of a sheet material obtained by partially pressing a flexible sheet-like nonwoven material containing basic fibers and a binder having a lower melting point than the basic fibers from opposite sides and heating at least one surface of a pressed part, thereby having a cured partial area, and having an internal space capable of accommodating a wiring harness. The accommodating portion includes a hard portion and a soft portion softer than the hard portion along a longitudinal direction.
    Type: Application
    Filed: June 11, 2014
    Publication date: June 2, 2016
    Applicants: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electronic Industries, Ltd.
    Inventors: Shigeto KATOU, Atsushi MURATA
  • Patent number: 8872309
    Abstract: Group-III nitride crystal composites made up of especially processed crystal slices, cut from III-nitride bulk crystal, whose major surfaces are of {1-10±2}, {11-2±2}, {20-2±1} or {22-4±1} orientation, disposed adjoining each other sideways with the major-surface side of each slice facing up, and III-nitride crystal epitaxially present on the major surfaces of the adjoining slices, with the III-nitride crystal containing, as principal impurities, either silicon atoms or oxygen atoms.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: October 28, 2014
    Assignee: Sumitomo Electronic Industries, Ltd.
    Inventors: Naho Mizuhara, Koji Uematsu, Michimasa Miyanaga, Keisuke Tanizaki, Hideaki Nakahata, Seiji Nakahata, Takuji Okahisa
  • Patent number: 8652862
    Abstract: A method for etching an insulating film includes the steps of forming an insulating film; forming a first resin layer composed of a non-silicon-containing resin on the insulating film; forming a pattern including projections and recesses in the first resin layer; forming a second resin layer composed of a silicon-containing resin to cover the projections and the recesses of the pattern in the first resin layer; etching the second resin layer by reactive ion etching with etching gas containing CF4 gas and oxygen gas until the projections of the first resin layer are exposed, a Si component of the second resin layer being oxidized in etching the second resin layer; selectively etching the first resin layer until the insulating film is exposed using as a mask the second resin layer buried in the recesses of the first resin layer to form a resin layer mask; and etching the insulating film using the resin layer mask.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: February 18, 2014
    Assignee: Sumitomo Electronic Industries Ltd.
    Inventor: Yukihiro Tsuji
  • Patent number: 8619828
    Abstract: A group III nitride substrate has a semi-polar primary surface. A first cladding layer has a first conductivity type, and comprises aluminum-containing group III nitride. The first cladding layer is provided on the substrate. An active layer is provided on the first cladding layer. A second cladding layer has a second conductivity type, and comprises aluminum-containing group III nitride. The second cladding layer is provided on the active layer. An optical guiding layer is provided between the first cladding layer and the active layer and/or between the second cladding layer and the active layer. The optical guiding layer comprises a first layer comprising Inx1Ga1-x1N (0?x1<1) and a second layer comprising Inx2Ga1-x2N (x1<x2<1). The second layer is provided between the first layer and the active layer. The total thickness of the first layer and the second layer is greater than 0.1 ?m. The wavelength of laser light is in a range of 480 nm to 550 nm.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: December 31, 2013
    Assignee: Sumitomo Electronic Industries, Ltd.
    Inventors: Katsushi Akita, Yohei Enya, Takashi Kyono, Masahiro Adachi, Shinji Tokuyama, Yusuke Yoshizumi, Takamichi Sumitomo, Masaki Ueno
  • Patent number: 7695290
    Abstract: A board connector (1) has a housing (10) and terminal fittings (20) penetrate through the back wall (11) of the housing (10). A board connecting portion (21) of each terminal fitting (20) penetrates through the back wall (11) and is solder-connected to a board (2). The housing (10) has a heat transfer inhibiting portion for inhibiting heat transfer to the back wall (11). The heat transfer inhibiting portion has a through-hole (13) or heat-insulating grooves (17) in the back wall (11). As a result, heat transfer to the back wall (11) is inhibited and deformation of the back wall (11) due to thermal expansion also is inhibited. Consequently, it is possible to prevent the terminal fittings (20) from separating from the board (2) and going into a state of being not solder-connected thereto.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: April 13, 2010
    Assignees: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electronic Industries, Ltd.
    Inventors: Hiroshi Nakano, Masahide Hio, Kenji Okamura, Hiroki Hirai, Hiroomi Hiramitsu, Osamu Hirabayashi
  • Publication number: 20090071394
    Abstract: A low dislocation density AlxInyGa1-x-yN single crystal substrate is made by forming a seed mask having parallel stripes regularly and periodically aligning on an undersubstrate, growing an AlxInyGa1-x-yN crystal on a facet-growth condition, forming repetitions of parallel facet hills and facet valleys rooted upon the mask stripes, maintaining the facet hills and facet valleys, producing voluminous defect accumulating regions (H) accompanying the valleys, yielding low dislocation single crystal regions (Z) following the facets, making C-plane growth regions (Y) following flat tops between the facets, gathering dislocations on the facets into the valleys by the action of the growing facets, reducing dislocations in the low dislocation single crystal regions (Z) and the C-plane growth regions (Y), and accumulating the dislocations in cores (S) or interfaces (K) of the voluminous defect accumulating regions (H).
    Type: Application
    Filed: November 18, 2008
    Publication date: March 19, 2009
    Applicant: SUMITOMO ELECTRONIC INDUSTRIES, LTD.
    Inventors: Seiji NAKAHATA, Ryu HIROTA, Kensaku MOTOKI, Takuji OKAHISA, Koji UEMATSU
  • Patent number: 7426224
    Abstract: The present invention is to provide an optical transmitter that installs a laser diode and a circuit to control currents supplied to the laser diode, and reduces the size of the control circuit. The transmitter includes an LD, an LD-Driver, a monitor PD, and a control unit that outputs two data for the bias and modulation currents to the driver based on the photocurrent. The control unit provides a memory whose addresses correspond to the bias current, while a data for the modulation current is set within an address of the memory. Accordingly, the control unit adjusts the bias current so as to maintain the photocurrent constant and outputs the data for the modulation current to the driver by reading information stored in the address corresponding to the bias current.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: September 16, 2008
    Assignee: Sumitomo Electronic Industries, Ltd.
    Inventor: Hiroto Ishibashi
  • Publication number: 20060118775
    Abstract: An automotive headlamp is equipped with a light source containing one or more light-emitting devices (LEDs) and a base member (a pedestal and rear case) for securing the light source to the automobile. The LED includes: a GaN substrate 1; a n-type AlxGa1-xN layer 3 on a first main surface side of the GaN substrate 1; a p-type AlxGa1-xN layer 5 positioned further away from the GaN substrate 1 compared to the n-type AlxGa1-xN layer 3; and a multi-quantum well 4 positioned between the n-type AlxGa1-xN layer 3 and the p-type AlxGa1-xN layer 5. In this LED, the specific resistance of the GaN substrate 1 is no more than 0.5 ?·cm, the p-type AlxGa1-xN layer 5 side is down-mounted, and light is discharged from a second main surface 1a, which is the main surface of the GaN substrate 1 opposite from the first main surface.
    Type: Application
    Filed: November 7, 2005
    Publication date: June 8, 2006
    Applicant: Sumitomo Electronic Industries, Ltd.
    Inventors: Youichi Nagai, Takao Nakamura, Koji Katayama
  • Patent number: 6116930
    Abstract: A rotary connection unit includes a fixed-side member, a rotary-side member rotatable to the fixed-side member around a central rotational axis, the rotary-side member and the fixed-side member defining an annular space, and a cable received in the space in such a manner that one end portion thereof is held by the fixed-side member, and the other end portion thereof is held by the rotary-side member. The space has a winding surface on which the cable is wound to a predetermined direction at a predetermined taper angle with respect to the central rotational axis. The cable is received in the space in such a manner that the cable is folded back midway so that the cable is wound to a direction opposite to the predetermined direction.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: September 12, 2000
    Assignees: Harness System Technologies, Sumitomo Wiring Systems, Ltd, Sumitomo Electronic Industries, Ltd.
    Inventor: Tomoyuki Sakata
  • Patent number: 5959389
    Abstract: A first surface acoustic wave device for 2nd mode surface acoustic wave of a wavelength .lambda. (.mu.m) according to the present invention is a SAW device of "type A" device shown in FIG. 6A, wherein a parameter kh3=2.pi.(t.sub.A /.lambda.) is: 0.033.ltoreq.kh3.ltoreq.0.099, and wherein a parameter kh1=2.pi.(t.sub.Z /.lambda.) and a parameter kh2=2.pi.(t.sub.S /.lambda.) are given within a region ABCDEFGHIJKLA in a two-dimensional Cartesin coordinate graph of FIG. 1.
    Type: Grant
    Filed: November 4, 1997
    Date of Patent: September 28, 1999
    Assignee: Sumitomo Electronic Industries, Ltd.
    Inventors: Hideaki Nakahata, Tomoki Uemura, Kenjiro Higaki, Satoshi Fujii, Hiroyuki Kitabayashi, Shin-ichi Shikata
  • Patent number: 5146529
    Abstract: A coated optical fiber and an optical fiber unit including a plurality of coated optical fibers as well as a method of forming the optical fiber unit. The coated optical fiber is able to minimize transmission losses of the optical fiber unit by utilizing a pigment in a resin covering layer that covers an optical fiber strand in a specific range, the range being from 0.01 to 1.40 percent by weight.
    Type: Grant
    Filed: August 2, 1991
    Date of Patent: September 8, 1992
    Assignee: Sumitomo Electronic Industries Ltd.
    Inventor: Akihiko Mizutani