Abstract: One embodiment of the present invention provides a system that generates a clock signal within an integrated circuit. This system includes four clocking elements organized into a ring, wherein each clocking element includes at least one input and at least one output, and wherein a signal at an input is complemented at a corresponding output. These clocking elements are spatially distributed throughout the integrated circuit, so that each clocking element provides the clock signal to a different region of the integrated circuit. These clocking elements are also coupled together though a plurality of interconnections, so that each output of each clocking element is coupled to at least one input of a neighboring clocking element. Furthermore, a given signal is inverted an odd number of times in traversing a closed path beginning and ending at any output of any of the four clocking elements and passing through a neighboring clocking element.

Abstract: A method for providing network device status notification includes providing at least one auditory cue to indicate at least one device status. According to one aspect, distinct auditory cues are provided when a device begins looking for a federation, when a device has connected to federation and when a device has disconnected from a federation. A network device includes a network interface and an auditory cue unit coupled to the network interface to provide at least one auditory cue to indicate at least one activity status.

Abstract: A method and apparatus are provided for locating buried objects prior to digging at a current location. According to the invention, a positioning device is taken to the location where digging is to take place. The positioning device receives positioning signals from one or more positioning stations, and based upon the positioning signals, determines the current location of the positioning device and hence the location of the dig site. Once the current location is determined, a registry database containing the locations of previously buried objects is accessed. The registry database is queried for all locations within a selected distance of the current location which have buried objects. If this query returns no records, then it is probably safe to dig at the current location. On the other hand, if the query returns one or more locations, then further digging at the current location should either be avoided or performed with great caution.

Abstract: A method and system is disclosed for detaching Java applets from the constraints of the application such as a browser which provides the Java engine for executing those applets. Thus, the applets, when detached, can appear in a detached window which is more easily controllable by the operating environment desktop. The Java applets continue to run under the application's virtual machine but do so without regard to the graphical interface limits of the application. Further, if the application that launched the applet proceeds to a new URL location, the Java applet continues to run. Also, the applet, once detached, can be reattached into the application to appear in the application history.

Abstract: The present invention discloses improved cooling designs and methods for the cooling of heat sources. One embodiment of the present invention is a cooling system comprising a housing and at least one divider disposed within the housing. The at least one divider creates a plurality of airflow channels through the housing. Another embodiment of the invention is a method for dissipating heat from heat sources within an electrical assembly comprising at least partially separating the heat sources with a divider. Separate airflow channels are created whereby the separated heat sources are disposed within the separated airflow channels. Forced airflow streams are generated through the separated airflow channels, thereby dissipating heat from the heat sources into the forced airflow streams.

Abstract: SYSTEM V utilities enable software developers to provide delivery of complex packages onto a UNIX operating system. An enhancement to the UNIX System V ABI format called class archive format enables sets of files to be combined into archives, these files being compressed or encrypted. The compressed/encrypted ABI package install with behavior defined in System V ABI. The class archive format allows a manufacturer to combine files from the ABI format reloc directory and root directory, into an archive directory. Class action format adds a directory called archive to the ABI format. Any class of files that are intended for archive is combined into a single file, and each file is then placed into the archive directory as class1, class2, etc. All files that are archived in this manner are removed from the standard ABI reloc directory and root directory, and an install class action script is placed into the scripts portion of the standard ABI install directory.

Abstract: Systems and methods for testing interfaces to a server object are provided. A translator object is placed between a client object and the server object for which the interface is to be tested. The client and server objects communicate utilizing tested interfaces, however, the translator object communicates requests between the two utilizing the interface under test. In this manner, an existing test suite for static interfaces may be utilized to test dynamic interfaces without requiring that a new test suite be developed.

Abstract: In one embodiment, a multiprocessing computer system includes a plurality of nodes. The plurality of nodes may be interconnected through a global interconnect network which supports cluster communications. An initiating node may launch a request to a remote nodes memory. In the event of an error, an error status register of a system interface of the launching cluster node is set to indicate the occurrence of an error. The error may be the result of an access violation, or the result of a time-out occurrence in either the remote node or the initiating node. Various other errors may alternatively be reported. The system interface advantageously includes a plurality of error status registers, with a separate error status register provided for each processor included in the node. A process running on any of the processors of the node reads an error by issuing a transaction to a unique address, wherein the unique address is independent of the processor upon which the process is running.

Abstract: A shared write back buffer for storing data from a data cache to be written back to memory. The shared write back buffer includes a plurality of ports, each port being associated with one of a plurality of processing units. All processing units in the plurality share the write back buffer. The shared write back buffer further includes a data register for storing data provided through the input ports, an address register for storing addresses associated with the data provided through the input ports, and a single output port for providing the data to the associated addresses in memory.

Abstract: Methods, systems, and articles of manufacture consistent with the present invention process a virtual call during execution of a multi-threaded program by ensuring that the steps of patching the virtual call to the appropriate method are performed within a single instruction cycle. This prevents other threads from executing instructions related to the virtual call in the middle of the patching procedure. Methods, systems, and articles of manufacture consistent with the present invention identify a target, such as a targeted method and a class of a receiver object, associated with the virtual call and then determine an address identifier, such as a memory address pointer to the class of the receiver object.

Abstract: Switching noise within an LGA-packaged or PGA-packaged IC Vdd and IC Vss nodes is reduced by spreading the electrical current in the bypass path to reduce the effective current loop area, and thus reduce the energy stored in the magnetic field surrounding the current path. This result is achieved by minimizing the horizontal components of the linkage paths between the IC nodes to be bypassed and the bypass capacitor. Since effective inductance Leff seen by the bypass capacitor is proportional to magnetic energy, Leff is reduced over a broad band of frequencies. For each bypass capacitor, a pair of conductive vias is formed. A first via is coupled to the LGA package Vcc plane and to the IC Vdd node, and a second via is coupled to the LGA package Vss plane and to the IC Vss node.

Abstract: A fan control module is provided for a system unit. The fan control module includes power outputs for supplying power to a plurality of fan. It also includes a temperature sensor for giving a temperature signal. It further includes a control unit connected to receive the temperature signal and including preprogrammed control information for determining power signals to be supplied to each of the fan units for controlling the speed thereof. The fan control module can control the fan units in a coordinated manner enabling reliable and effective cooling of the system unit under widely varying parameters. It can mean that existing system components can be employed in harsher temperature environments that they were originally designed for, without needed a complete redesign thereof. The fan control module can be provided with electrical noise isolation circuitry to isolate other components from electrical noise generated by the fan units.

Abstract: A system and method for rapid processing of scene-graph-based data and/or programs is disclosed. In one embodiment, the system may be configured to utilize a scene graph directly. In another embodiment, the system may be configured to generate a parallel structure including a plurality of data structures and corresponding threads that manage the data originally received as part of the scene graph. The data structures and threads may be configured to convey information about state changes through the use of messaging. The system may include support for messaging between threads, messaging with time and/or event stamps, epochs to ensure consistency, and ancillary structures such as render-bins, geometry structures, and rendering environment structures.

Abstract: Methods, apparatus and computer program products are disclosed for a method of invoking a native method in a Java virtual machine (“JVM” ). A special-purpose fast interface, executing in conjunction with an interpreter loop, for native methods reduces C stack recursion in the JVM. The interface performs as an extension to the interpreter loop component in the JVM in that a native method, invoked via the special-purpose interface, is able to modify the interpreter loop state if necessary. This is done without adding new bytecode instructions. A method of executing a native method in a Java virtual machine is described. The JVM first determines whether a native method is to be handled by a special native interface or one of multiple other native interfaces. If it is determined that the method is to be handled by the special native interface, the method is invoked and passed arguments enabling it to access the state of the JVM. The method is then executed.

Abstract: In one aspect of the present invention, a method provides a connecting path diversion through an upper layer of an integrated circuit by alteration of a connecting path through a lower layer of the integrated circuit. This method enables a circuit path in an integrated circuit to be modified in an accessible layer for testing before the modified circuit path is incorporated in a redesigned integrated circuit design. In another aspect of the present invention, a modified multi-layer integrated circuit chip includes a connecting path formed in a lower layer and a substitute connecting path that is etched in the lower layer. Subsequently, the connecting path formed in the lower layer may be severed.

Abstract: A system and a method to transfer data between a host computer and a storage device. The storage controller architecture is organized into its functional modules based on whether a module primarily performs a control function or a data transfer function. The data paths that connect various functional units (for example, switching unit, parity logic, memory module, etc.) may then be sized to the required bandwidth. This effectively makes the iops (I/O operations per second) and bandwidth capability of a storage controller scalable independently of each other. A data transfer command from a host computer is decoded and translated into one or more data transfer commands by the control module in the storage controller. The control module then sends a list of translated commands to the host. Parity calculation, caching, one or more RAID levels and other relevant data transfer information may also be included as part of the translated set of commands.

Abstract: A method for determining the value of at least one capacitance required to be placed in a conductive path on a printed circuit board is disclosed. The method includes preparing a desired signal spectrum for the conductive path, preparing an actual signal spectrum for the conductive path, and then comparing the actual signal spectrum against the desired signal spectrum to determine where any out of tolerance conditions exist. If the actual signal spectrum is in amplitude versus time form, the method further includes performing, for each time having a voltage which is higher than the maximum voltage allowed on the conductive path, a fourier transform on the amplitude versus time data.

Abstract: A hybrid system for efficiently performing a cmod operation in solving a system of linear algebraic equations involving a sparse coefficient matrix. The system operates by identifying supernodes in the sparse matrix, wherein each supernode comprises a set of contiguous columns having a substantially similar pattern of non-zero elements. In solving the equation, the system performs a column modification (CMOD) operation between a source supernode and a destination supernode. As part of this CMOD operation, the system determines dimensions of the source supernode and the destination supernode. If a result of a function on the dimensions is lower than a threshold value, the system performs the CMOD operation between the source supernode and the destination supernode using a kernel that is written in an architecture-independent high-level language.

Abstract: A sense amplifier having dual differential inputs configured to accept differential analog input voltages. The differential analog input voltages are fused to determine a weighted signal digitally representative of the differential analog input voltages. An input offset voltage cancellation circuit may be coupled to the sense amplifier to reduce an input offset voltage of the sense amplifier.

Abstract: An image processor converts single-band pixel components, each of which represents a single band of a multiple-band pixel, to multiple-band pixels. A embodiment, a single read operation reads four single-band pixel components from each of three buffers which correspond to red, green, and blue bands, respectively, of a multiple-band graphical image. A single merge operation merges eight single-band pixel components representing alpha and green bands of four multiple-band pixels, and a single merge operation merges eight single-band pixel components representing blue and red bands of four multiple-band pixels. Two merge operations merge the respective merged data words to form four multiple-band pixels, each of which includes alpha, blue, green, and red components. The four multiple-band pixels are written to a destination buffer in four write operations.