Abstract: A method of fabricating a solar cell is disclosed. The method can include forming a dielectric region on a surface of a solar cell structure and forming a metal layer on the dielectric layer. The method can also include configuring a laser beam with a particular shape and directing the laser beam with the particular shape on the metal layer, where the particular shape allows a contact to be formed between the metal layer and the solar cell structure.

Abstract: An energy evaluation system includes an energy system modeling framework and an Application Program Interface (API) as part of the energy system evaluation framework. The energy evaluation system can be configured to query a simulation application program interface (API) with PV system configuration parameters as arguments, generate a shade loss time series based on the system configuration parameters, simulate energy output for the PV system based on the shade loss time series, and output energy aggregations based on the simulation.

Abstract: Photovoltaic panels may be aggregated in various ways and may be aggregated with the use of a backplane where the backplane comprises electrical connectors positioned to electrically connect the PV panels. The PV panels may have various sizes and shapes and may overlap one or more other PV panels or PV panels being aggregated.

Abstract: Solar cells having emitter regions composed of wide bandgap semiconductor material are described. In an example, a method includes forming, in a process tool having a controlled atmosphere, a thin dielectric layer on a surface of a semiconductor substrate of the solar cell. The semiconductor substrate has a bandgap. Without removing the semiconductor substrate from the controlled atmosphere of the process tool, a semiconductor layer is formed on the thin dielectric layer. The semiconductor layer has a bandgap at least approximately 0.2 electron Volts (eV) above the bandgap of the semiconductor substrate.

Abstract: A solar device includes a first string of first solar wafers, wherein a plurality of the first solar wafers each overlap with at least one vertically adjacent solar wafer from the first string. Additionally, the solar device includes a second string of second solar wafers, wherein a plurality of the second solar wafers each overlap with at least one vertically adjacent solar wafer from the second string, wherein a plurality of the first solar wafers overlap with one or more of the plurality of second solar wafers to electrically connect horizontally adjacent solar wafers in parallel.

Abstract: A wafer plating fixture for use in simultaneously electroplating a two substrates. The wafer plating fixture including: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus and configured to hold the two substrates in place and electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer to separate the two substrates coupled to the carrier bus. A method of electroplating a plurality of substrates. The method including: mounting two substrates to be plated onto a wafer plating fixture; mounting the wafer plating fixture on a continuous belt of plating system; dipping the wafer plating fixture with the two substrates held thereon into an electroplating bath; and applying a voltage to the two substrates via the wafer plating fixture.

Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a solar cell can include a substrate having a light-receiving surface and a back surface. A first doped region of a first conductivity type, wherein the first doped region is disposed in a first portion of the back surface. A first thin dielectric layer disposed over the back surface of the substrate, where a portion of the first thin dielectric layer is disposed over the first doped region of the first conductivity type. A first semiconductor layer disposed over the first thin dielectric layer. A second doped region of a second conductivity type in the first semiconductor layer, where the second doped region is disposed over a second portion of the back surface. A first conductive contact disposed over the first doped region and a second conductive contact disposed over the second doped region.

Abstract: Mounting a solar panel system includes installing a skirt to a roof in a predetermined position, the predetermined position guiding an alignment for additional components installed in the solar panel system; integrating a solar panel with a flange of the skirt, wherein the skirt supports a portion of the solar panel; determining if a width of the solar panel system will be increased; installing an additional skirt to which an additional solar panel is attached in response to determining that the width of the solar panel system will be increased; determining if a length of the solar panel system will be increased; and integrating an additional solar panel with a flange of a previously installed solar panel via a mount interface in response to determining that the length of the solar panel system will be increased.

Abstract: Reconfigurable PV panels can have features that include cut lines for separating full panels into smaller subpanels, connector ribbons for assembling several reconfigurable PV panels into a one-dimensional or two-dimensional array and can be stacked upon each other and unstacked by rotating them about a shared connection.

Abstract: A photovoltaic panel having a distributed support frame adhered to a photovoltaic module is described. For example, the distributed support frame may include one or more support member or support mounts adhered to the photovoltaic module by an adhesive layer. The photovoltaic module may include layers bound together by an encapsulant. Accordingly, the distributed support frame may be attached to the photovoltaic module during a same lamination process used to laminate the photovoltaic module.

Abstract: Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed in a plurality of non-continuous trenches in the back surface of the substrate.

Abstract: A solar power system can include a rail and a solar module disposed on the rail. A clamp assembly can couple the solar module to the rail. The clamp assembly can have a clamped configuration in which the solar module is secured to the rail and an unclamped configuration. The clamp assembly can comprise an upper clamp member, a lower clamp member coupled to the rail, and a stabilization member mechanically engaging the upper clamp member and the lower clamp member. The stabilization member can prevent rotation of the lower clamp member relative to the rail when the clamp assembly is in the clamped and unclamped configurations. In the unclamped configuration, the stabilization member can be biased such that the upper clamp member is disposed at a sufficient clearance above the rail to permit the insertion of the solar module between the upper clamp member and the rail.

Abstract: The present disclosure provides systems and methods for integrating an energy control system with an electrical system having a utility meter connected to a utility grid, a photovoltaic (PV) system, an energy storage system, and a plurality of electrical loads. The systems and methods include determining a site condition of the electrical system, determining a type of backup configuration for the electrical system based on the determined site condition, and determining a location of at least one of a main circuit breaker, the PV system, a subpanel, and a site current transformer with respect to the energy control system based on the determined site condition and the determined type of backup configuration.

Abstract: A bipolar solar cell includes a backside junction formed by an N-type silicon substrate and a P-type polysilicon emitter formed on the backside of the solar cell. An antireflection layer may be formed on a textured front surface of the silicon substrate. A negative polarity metal contact on the front side of the solar cell makes an electrical connection to the substrate, while a positive polarity metal contact on the backside of the solar cell makes an electrical connection to the polysilicon emitter. An external electrical circuit may be connected to the negative and positive metal contacts to be powered by the solar cell. The positive polarity metal contact may form an infrared reflecting layer with an underlying dielectric layer for increased solar radiation collection.

Abstract: Composite making regions are provided. These masking regions can include layers or other areas of different transparency where a first region has a first transparency and a second region has a different transparency. Masking regions can be positioned between adjacent photovoltaic cells of photovoltaic arrays.

Abstract: One embodiment is a photovoltaic (PV) module including a frame to receive a perimeter of a backside of a photovoltaic (PV) laminate. The cross rail assembly may include: a conductive frame to receive a perimeter of a backside of a photovoltaic (PV) laminate; one or more conductive cross rail members provide structural rigidity to the conductive frame; and one or more pairs of couplers coupled to the conductive frame, wherein: at least one coupler comprises a grounding coupler having a first keyed section to insert into an opening in the conductive frame and a second keyed section to mate with an end of a conductive cross rail member of the one or more conductive cross rail members to ground the conductive cross rail member to the frame; or at least one coupler of at least one of the one or more pairs includes a length to define a cabling channel.