Abstract: A primary controller of a switching power supply and the switching power supply are provided. The primary controller includes an input voltage detection module which receives a detected signal and generates a detection signal; a controller module which receives a feedback signal and a current sampling signal of the switching power supply, and generates a control signal according to the feedback signal and the current sampling signal; a PWM signal generation module, receive the detection signal and the control signal, generate a PWM signal according to the control signal when the detection signal is the second level, and stop generating the PWM signal when the detection signal is the first level; and a power switch transistor, having a control terminal coupled with an output terminal of the PWM signal generation module.

Abstract: Disclosed are a control method and a control circuit for a switching power supply, said switching power supply comprises a secondary side controller and a secondary side MOS transistor connected between a load and a secondary side winding of a transformer. The present invention is used for detecting a working state of the secondary side winding of a transformer and a type of a communication signal transmitted by a load, and for generating a switching pulse signal VG in a Reset Time interval of an on/off cycle according to the type of the communication signal; the primary side controller detects a variation amplitude of the transiently varied signal of the voltage drop at the pin feedback (FB) in the Reset Time interval; if the variation amplitude of the transiently varied signal is greater than a pre-set value ?Vref, the primary side controller judges that the signal is a communication signal, and records the communication signal.

Abstract: A switching power supply is provided which includes: an output port; a transformer; a first voltage divider circuit, configured to divide a feedback voltage to obtain a first divided voltage; and a primary controller, configured to control a current of the primary winding of the transformer; where the primary controller includes: a first comparison module, configured to compare the first divided voltage with a first reference voltage to obtain a first comparison result; a second comparison module, configured to compare the power supply voltage with a second reference voltage to obtain a second comparison result; and an open circuit protection module, configured to generate an open circuit protection signal, where the primary controller is configured to stop control of the primary winding in response to the open circuit protection signal. The present disclosure can efficiently detect disconnection of the up-sampling resistor of the switching power supply and provide open-circuit protection.

Abstract: A compensation circuit for constant output voltage is disclosed. The compensation circuit comprises a current source, a first switch, a controllable current source, a second switch, a logic NOT gate, a CV loop control module, and an input voltage detection module. The compensation circuit ensures a normal start-up, and substantially no additional power dissipation of the converter is generated at no load. Furthermore, the compensation circuit adjusts a compensation current according to at least one of a detected input voltage of the power supply converter and a working mode of the transformer, to obtain better precision of constant output voltage. The compensation circuit can be applied to occasions where extremely small standby input power dissipation or extremely high precision of constant output voltage is required.

Abstract: A high voltage start-up circuit with adjustable start-up time, wherein, the drain electrode of the first NMOS transistor is connected with a first terminal of the first resistor, a gate electrode of the second NMOS transistor and a negative terminal of the diode; a source electrode of the first NMOS transistor, together with a positive terminal of the diode, is connected to the power ground; a drain electrode of the second NMOS transistor, together with a second terminal of the first resistor, is connected with a port SW of a chip; a source electrode of the second NMOS transistor, together with a first terminal of the second resistor, is connected with a power port VDD of the chip. The circuit can adjust the start-up time and the restart time of the chip flexibly.

Abstract: A semiconductor device with a current sampler and a start-up structure, comprises first, second and third high-voltage transistors, and a resistor, wherein: a drain terminal of the first transistor is respectively connected to a drain terminal of the second transistor, a drain terminal of the third transistor and one end of the resistor; a source terminal of the first transistor is grounded, and a gate terminal of the first transistor is connected to a gate terminal of the second transistor; the other end of the resistor is connected to a gate terminal of the third transistor; wherein the resistor is wound and formed in a common voltage withstand region of the first transistor, the second transistor and the third transistor, or in a voltage withstand region of the first transistor only, or in the voltage withstand region of the third transistor only.

Abstract: A termination for silicon superjunction VDMOSFET comprises heavily doped N-type silicon substrate which also works as drain region; drain metal is disposed on the back surface of the heavily doped N-type silicon substrate; an N-type silicon epitaxial layer is disposed on the heavily doped N-type silicon substrate; P-type silicon columns and N-type silicon columns are formed in the N-type silicon epitaxial layer, alternately arranged; a continuous silicon oxide layer is disposed on a part of silicon surface in the termination; structures that block the drift of mobile ions (several discontinuous silicon oxide layers arranged at intervals) are disposed on the other part of silicon surface in the termination. The structures that block the drift of mobile ions disposed in the termination region are able to effectively prevent movement of the mobile ions and improve the capability of the power device against the contamination induced by the mobile ions.

Abstract: A termination for silicon superjunction VDMOSFET comprises heavily doped N-type silicon substrate which also works as drain region; drain metal is disposed on the back surface of the heavily doped N-type silicon substrate; an N-type silicon epitaxial layer is disposed on the heavily doped N-type silicon substrate; P-type silicon columns and N-type silicon columns are formed in the N-type silicon epitaxial layer, alternately arranged; a continuous silicon oxide layer is disposed on a part of silicon surface in the termination; structures that block the drift of mobile ions (several discontinuous silicon oxide layers arranged at intervals) are disposed on the other part of silicon surface in the termination. The structures that block the drift of mobile ions disposed in the termination region are able to effectively prevent movement of the mobile ions and improve the capability of the power device against the contamination induced by the mobile ions.