Abstract: The present document discloses a heterostructure for a high electron mobility transistor (HEMT). The heterostructure comprises a SiC substrate, an InxAlyGa1-x-yN nucleation layer (12), wherein x=0-1, y=0-1, preferably x<0.05 and y>0.50, more preferably x<0.03 and y>0.70 and most preferably x<0.01 and y>0.90, formed on the SiC substrate. The heterostructure further comprises a GaN channel layer formed on the InxAlyGa1-x-yN nucleation layer. A thickness of the GaN channel layer is 50 to 500 nm, preferably 100 to 450 nm, most preferably 150 to 400 nm. The GaN channel layer presents a rocking curve with a (002) peak having a FMHW below 300 arcsec, and a rocking curve with a (102) peak having a FMHW below 400 arcsec as determined by X-ray diffraction, XRD. A surface of an uppermost layer of the heterostructure (1) exhibits an atomic step-flow morphology with rms roughness over a 10 ?m2 scan area of below 1.8 nm, preferably below 1.

Abstract: The present document discloses an AlxGa1?xN/GaN heterostructure, wherein x is 0.10<x<0.60, preferably 0.13<x<0.40, most preferably 0.15<x<0.25. The heterostructure comprises an AlxGa1?xN layer formed directly on a GaN layer. The heterostructure presents a room temperature 2DEG mobility of 1800 to 2300 cm2/Vs, preferably 1900 to 2300 cm2/Vs, most preferably 2000 to 2300 cm2/Vs, and a pinch-off voltage which differs by 0.3 V or less, preferably by 0.25 V or less, most preferably by 0.20 V or less from a theoretical value of the pinch-off voltage, wherein the theoretical value of the pinch-off voltage is estimated based on an electrostatic band diagram obtained by XRD, of the AlxGa1?xN/GaN heterostructure.

Abstract: The present document discloses a semiconductor device structure (1) comprising a SiC substrate (11), an Inx1Aly1Ga1-x1-y1N buffer layer (13), wherein x1=0-1, y1=0-1 and x1+y1=1, and an Inx2Aly2Ga1-x2-y2N nucleation layer (12), wherein x2=0-1, y2=0-1 and x2+y2=1, sandwiched between the SiC substrate (11) and the buffer layer (13). The buffer layer (13) presents a rocking curve with a (102) peak having a FWHM below 250 arcsec, and the nucleation layer (12) presents a rocking curve with a (105) peak having a FWHM below 200 arcsec, as determined by X-ray Diffraction (XRD). Methods of making such a semiconductor device structure are disclosed.

Abstract: The present document discloses a semiconductor device structure (1) comprising a SiC substrate (11), an Inx1Aly1Ga1-x1-y1N buffer layer (13), wherein x1=0-1, y1=0-1 and x1+y1=1, and an Inx2Aly2Ga1-x2-y2N nucleation layer (12), wherein x2=0-1, y2=0-1 and x2+y2=1, sandwiched between the SiC substrate (11) and the buffer layer (13). The buffer layer (13) presents a rocking curve with a (102) peak having a FWHM below 250 arcsec, and the nucleation layer (12) presents a rocking curve with a (105) peak having a FWHM below 200 arcsec, as determined by X-ray Diffraction (XRD). Methods of making such a semiconductor device structure are disclosed.

Abstract: A method to grow a semi insulating SiC layer. The method may include growing the semi insulating SiC layer on a substrate, and creating deep defects in the grown semi insulating SiC layer, whereby a semi insulating property is created in the grown semi insulating SiC layer. Alternatively, the method may include growing a semi insulating SiC layer, creating deep defects in the grown semi insulating SiC layer, whereby the semi insulating property is created in the grown semi insulating SiC layer, and using source material during the growth such that the semi insulating SiC layer is made isotope enriched.

Abstract: The present document discloses a semiconductor device structure (1) comprising a SiC substrate (11), an Inx1Aly1Ga1-x1-y1N buffer layer (13), wherein x1=0-1, y1=0-1 and x1+y1=1, and an Inx2Aly2Ga1-x2-y2N nucleation layer (12), wherein x2=0-1, y2=0-1 and x2+y2=1, sandwiched between the SiC substrate (11) and the buffer layer (13). The buffer layer (13) presents a rocking curve with a (102) peak having a FWHM below 250 arcsec, and the nucleation layer (12) presents a rocking curve with a (105) peak having a FWHM below 200 arcsec, as determined by X-ray Diffraction (XRD). Methods of making such a semiconductor device structure are disclosed.