Abstract: A semiconductor wafer includes circuit integration regions each incorporating an integrated circuit and guard rings disposed to surround the circuit integration regions, respectively. A scribe region disposed between every adjacent two of the guard rings. An element and a pad electrically connected to the element are disposed in the scribe region. A groove is disposed along a corresponding guard ring on a front surface of the semiconductor wafer between the pad and the corresponding guard ring. The distance between the groove and the pad is varied along the corresponding guard ring.

Abstract: A display device includes a boosting power supply circuit, a logic circuit and a charge transport path. The boosting power supply circuit generates a boosted power supply voltage by boosting an analog power supply voltage. The logic circuit is responsive to a decrease in a voltage level on at least one of power supply lines to which analog and logic power supply voltages are supplied for controlling a source line drive circuitry and a gate line drive circuitry to discharge charges accumulated in the display panel. The charge transport path is configured to transport charges from a power supply line on which the boosted power supply voltage is generated to a power supply line which supplies an internal logic power supply voltage to the logic circuit in response to the decrease in the voltage level on the at least one of the first and second power supply lines.

Abstract: A semiconductor device includes: a semiconductor chip having a main face which has a pair of long sides parallel to each other and a pair of short sides orthogonal to the pair of long sides; first bumps arrayed in a first bump placement region of the semiconductor chip, the first bump placement region being positioned along one of the pair of long sides; second bumps arrayed in a second bump placement region of the semiconductor chip, the second bump placement region being positioned along the other of the pair of long sides; first power lines disposed in a region between the first bump placement region and the second bump placement region, the first power lines extending in a direction parallel to the pair of long sides; and third bumps integrated on the semiconductor chip. Each of the third bumps provides short-circuiting of the first power lines.

Abstract: Provided is a touch sensor panel which can increase the detection sensitivity of a touch relatively readily. The touch sensor panel controller supplies drive electrodes of a touch sensor panel with a high-voltage AC drive signal with its low level set to a negative voltage and drives them. The time of change of a drive waveform supplied to the drive electrodes of the touch sensor panel is shifted relative to the time of change of a drive waveform supplied to a display scan electrode. The touch sensor panel controller uses a charge pump in synchronization with clock signals of more than one phase to produce a high drive voltage to activate drive electrodes of the touch sensor panel, and the clock signals of more than one phase are initialized each time the drive electrode is subjected to AC pulse driving.

Abstract: The drive circuit operable to output a drive pulse pattern to drive electrodes of a touch panel is arranged so that it can change the pulse frequency of the drive pulse pattern for each drive electrode. The detection circuit operable to detect signal changes arising on detection electrodes of the touch panel for each drive pulse pattern output by the drive circuit is arranged so that it can change the sampling frequency of signal change for each detection electrode. The range to make higher the pulse frequency of the drive pulse pattern for each drive electrode, and the sampling frequency of signal change for each detection electrode is variably controlled according to a touch position where a touch has been detected by use of a detection signal detected by the detection circuit.

Abstract: Provided is a display control device capable of coping with high-resolution display readily in terms of conducting data write and read on a frame buffer memory in time for the timing of display. The display control device has a plurality of line buffers, and is arranged so that a writing process for writing, into part of the line buffers, display lines of display data from outside, and a reading process for reading out written display lines of display data from other line buffers can be conducted in parallel. In the display control device, display-line data read out from the line buffers are compressed and stored in the frame buffer memory. The compression-display data read out from the frame buffer memory are read out for each line, and decompressed into display lines of display data. The decompressed display data are used to drive signal electrodes of a display device.