Abstract: The display control device has a register for holding mode data for giving: a direction about which of a first display mode for performing display control of display data supplied together with a display timing signal from outside, and a second display mode for performing display control of display data written in RAM without accepting supply of a display timing signal from outside to select; and a direction about whether or not to select a scale-up mode for scaling up the display data, so that the mode data can be rewritten from the outside. The display mode is controlled based on the setting values on the register. The control register can be rewritten according to the type of data to be displayed, the system working situation, user settings, etc. Therefore, the low power consumption allowable in terms of system, and a required display performance can be obtained timely and readily.

Abstract: A power circuit section generates a first logic power supply voltage and an analog power supply voltage to supply to a first power supply line and a second power supply line, respectively. A regulator steps the first logic power supply voltage down to generate a second logic power supply voltage and supplies the second logic power supply voltage to a third power supply line. A logic circuit controls A source line driving section and A gate line driving section in response to a decrease of a voltage of the first power supply line so that the charge stored in the display panel is discharged. A charge transporting path is configured to transport the charge from the second power supply line to a third power supply line in response to the decrease of the voltage of the first power supply line.

Abstract: A display device includes a display panel and a driver. The driver generates APL-calculation image data corresponding to an APL-calculation luminance image through an APL-calculation filtering process on the input usage data, calculates area characterization data including first APL data of each area in the APL-calculation luminance image and calculates second APL data depending on the position of each pixel and the first APL data of the area characterization data associated with the area in which each pixel is located and with the adjacent areas to generate pixel-specific characterization data including the second APL data. The driver generates output image data on the basis of the second APL data of the pixel-specific image data and drives each pixel in response to the output image data. The APL-calculating filtering process involves setting a luminance value of the target pixel in the APL-calculation luminance image to a specific APL-calculation alternative luminance value.

Abstract: A semiconductor device includes a main structure, active bumps and dummy bumps which are provided over a surface of the main structure. The active bumps are arranged in first to n-th rows. The active bumps positioned in each row are arrayed in a first direction with a predetermined first pitch. The first to n-th rows of the active bumps are arrayed in a second direction perpendicular to the first direction. For j being any integer from one to n?1, a (j+1)-th row are shifted in the second direction from a j-th row of the active bumps by a second pitch and shifted in the first direction from the j-th row of the active bumps by a predetermined sub-pitch. The dummy bumps are arrayed in the first direction with the first pitch, and the length of each of the dummy bumps in the second direction is longer than the second pitch.

Abstract: Detection circuits cause a power supply circuit to start an initialization sequence by detecting abnormal behavior where an external power supply voltage is cut off, the power supply circuit generating a first internal power supply voltage from a first external power supply voltage and generating a second internal power supply voltage from a second external power supply voltage higher than the first external power supply voltage in terms of an absolute value, and an auxiliary amplifier that makes up for a drop in the first internal power supply voltage, using the second external power supply voltage as an operation power supply after detecting the abnormal behavior of the first external power supply voltage. A sample and hold circuit of a reference voltage of the auxiliary amplifier is configured in a hold state after detecting the abnormal behavior of the first external power supply voltage.