Patents Assigned to Synernetics Inc.
  • Patent number: 5471472
    Abstract: A network interface for connecting a first network utilizing a first medium access control protocol to a plurality of relatively slower networks utilizing a second medium access control protocol. The network interface includes memory in which a table of addresses of nodes on the plurality of second networks is maintained. The network interface passes data from a data packet received from the first network to one of the plurality of second networks only if the destination address of the data packet matches one of the node addresses within the table of node addresses. The network interface passes data from a data packet received from one of the plurality of second networks to the first network only if the destination address of the data packet does not match a node address in the table of node addresses.
    Type: Grant
    Filed: July 30, 1991
    Date of Patent: November 28, 1995
    Assignee: Synernetics Inc.
    Inventors: R. Bruce McClure, Christopher P. Lawler, Shannon Q. Hill
  • Patent number: 5317697
    Abstract: A live insertion and removal mechanism assures that a sub-assembly being inserted or removed from a live electronic assembly does not disrupt system power and buses and is protected against the negative affects of current surge. An active current control device and related circuitry, and a connector having a plurality of graduated pin lengths effect a controlled ramp-up and ramp-down of power to the sub-assembly inserted into and removed from the live electronic assembly. Additionally, means are provided for effectively disconnecting selected output drivers from signal and control paths to avoid damage to the drivers upon insertion or removal of the sub-assembly from the live assembly.
    Type: Grant
    Filed: July 31, 1991
    Date of Patent: May 31, 1994
    Assignee: Synernetics Inc.
    Inventors: David J. Husak, Jay L. Madnick, Stephen A. Hauser