Patents Assigned to Synthesys
  • Patent number: 6674312
    Abstract: A differential signal reception device and method for supporting variable threshold levels. The device flexibly makes an input to the decision circuit appear to an outside driving circuit as if the decision circuit were a purpose-built input network supporting a fixed impedance input into either a floating or fixed DC termination voltage. The device further allows the internal decision process to support a variable threshold level when deciding logical 1/0 values and to attenuate the users input signal range for the purpose of making sure the range of the user's signals do not exceed the operating range of readily available decision circuit (limiting amplifier) integrated circuits.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: January 6, 2004
    Assignee: Synthesys
    Inventor: Andrei Poskatcheev
  • Patent number: 6636994
    Abstract: Disclosed herein is a method for determining the location of at least one error in a digital data stream and identifying the data surrounding the error which comprises selecting a user data stream to be analyzed for errors, selecting a seed bit segment out of the user data stream and converting that to a reference data stream, synchronizing the reference data stream with the user data stream, determining if an error exists, if an error has occurred calculating where on the data stream the error occurred, comparing the data stream segment containing the error with the reference data stream, analyzing the data surrounding the error, and computing actual data values from phase, data type and error location.
    Type: Grant
    Filed: May 26, 2000
    Date of Patent: October 21, 2003
    Assignee: Synthesys
    Inventors: Thomas Eugene Waschura, James Roger Waschura
  • Publication number: 20030174789
    Abstract: Disclosed herein is a method and apparatus used to measure the number of time a multi-valued data signal transmitted from either a communication device of subsystem deviates across and into one or more bounded areas or zones as defined by an eye mask that is overlaid onto an eye diagram. The present invention employs an iterative process to accumulate and display mask violation that might result from a data signal transmitted from a target device or communications subsystem that deviates across the boundaries either above or below or into the center of the eye diagram. In addition, the present invention also has the ability to isolate particular threshold voltage-delay points along the boundaries above or below and around the perimeter of the mask polygon of the eye diagram where mask violations have occurred. This provides the ability to supply additional information and feedback about the behavior and performance of the targeted device or subsystem being tested.
    Type: Application
    Filed: March 14, 2002
    Publication date: September 18, 2003
    Applicant: SYNTHESYS
    Inventors: Thomas Eugene Waschura, James R. Waschura, Senthil Kumar Thandapani
  • Publication number: 20030174000
    Abstract: The present invention relates to a differential signal reception device and method for supporting variable threshold levels. The present invention flexibly makes an input to the decision circuit appear to an outside driving circuit as if the decision circuit were a purpose-built input network supporting a fixed impedance input into either a floating or fixed DC termination voltag 1844X The present invention further allows the internal decision process to support a variable threshold level when deciding logical 1/0 values and to attenuate the users input signal range for the purpose of making sure the range of the user's signals do not exceed the operating range of readily available decision circuit (limiting amplifier) integrated circuits.
    Type: Application
    Filed: March 15, 2002
    Publication date: September 18, 2003
    Applicant: SYNTHESYS
    Inventor: Andrei Poskatcheev
  • Publication number: 20030177438
    Abstract: Disclosed herein is a method that directs the components and signal detection path of a binary data bit decision mechanism used to obtain the bit error rate of the bit stream of an incoming or applied data signal to generate an eye diagram. More precisely, components such as the trigger-to-data delay adjustment to generate a delayed trigger pulse, the variable decision threshold setting, the bit detection flip flop in the input signal path to perform bit sampling, the total bits counter as a window size counter and the error counter to accumulate the occurrences when incoming signal exceeds a specified voltage threshold voltage range for a instance in time are used to implement the functionality required to generate the eye diagram.
    Type: Application
    Filed: March 15, 2002
    Publication date: September 18, 2003
    Applicant: SYNTHESYS
    Inventors: Thomas Eugene Waschura, Andrei Poskatcheev
  • Publication number: 20030097226
    Abstract: Apparatus and method for determining characteristics of a bit stream of binary pulses. The apparatus has control apparatus for defining a window comparator and logic apparatus for accumulating and mapping numbers derived from a count of the number of times the bit stream pulses fall at points inside the window comparator and drawing an eye diagram defining characteristics of the bit stream.
    Type: Application
    Filed: November 21, 2001
    Publication date: May 22, 2003
    Applicant: SYNTHESYS
    Inventors: Tohmas Eugene Waschura, Andrei Poskatcheev