Abstract: A gain control circuit and its gain control method, said gain control method comprising the following steps: firstly, outputting continuously a counter value; next, generating a ramp wave signal based on said counter value, and at a voltage where a control voltage signal intersects said ramp wave signal, obtaining an initial counter value based on said ramp wave signal, thus determining an initial voltage gain of an amplifier circuit; then, when a high or low voltage of an output signal of said amplifier circuit is greater or less than a predetermined detection voltage upper or lower limit, adjusting a DC voltage level of said ramp wave signal with a detection signal; and finally, obtaining at said voltage a counter value less than said initial counter value based on said ramp wave signal, hereby reducing said initial voltage gain based on said counter value.

Abstract: The present invention discloses an overcurrent detection device, which uses a first NOT gate and a second NOT gate to reverse the logic states of a first digital signal and a second digital signal which are digitalized audio signals in a class D power amplifier. Next, a CMOS transistor receives the reversed digital signals and drives a load. A comparing circuit detects the current of the load and compares the current with the reversed first and second digital signals. When the current of the load is too high, the comparing circuit respectively outputs a first electrical signal and a second electrical signal to a first logic gate and a second logic gate. Then, the logic gate outputs a signal to activate a protection circuit to prevent the entire circuit be damaged or burned out.

Abstract: The present invention discloses a circuit and method for generating a continuous pulse signal. The circuit of the present invention comprises: a PWM device generating a clock signal and a PWM signal, and a pulse continuity detector coupled to the PWM device. The pulse continuity detector further comprises: a positive pilot signal generator, a negative pilot signal and a multiplexer. The positive pilot signal generator is coupled to the PWM device to receive the clock signal and the PWM signal and then outputs a positive pilot signal. The negative pilot signal generator is coupled to the PWM device to receive the clock signal and the PWM signal and then outputs a negative pilot signal. The multiplexer is coupled to the PWM device, the positive pilot signal generator and the negative pilot signal generator to receive the PWM signal, the positive pilot signal and the negative pilot signal, and outputs the positive pilot signal or the negative pilot signal according to the PWM signal.

Abstract: The circuit contains an input signal unit, an amplifier unit, and a comparator unit, cascaded in the foregoing order. The circuit further contains a ramp generator unit providing a ramp signal to the comparator unit. In one embodiment of the present invention, at least one of the two links between the input signal unit and the amplifier unit is connected to a voltage unit. By providing an appropriate voltage through the voltage unit, the signals fed into the amplifier unit have different DC bias voltages. As such, the ramp signal crosses these signals at different points of time respectively, and the zero-crossing times of the first and second Class-D signals output by the comparator unit are thereby separated so as to achieve low switching noise and electromagnetic interference.

Abstract: A common mode feedback circuit includes a common mode feedback amplifier unit having output signals and a reference signal, and a combining circuit for combining or adjusting the output signals of the common mode feedback amplifier unit, to prevent the output signals from being distorted, and to maintain the output signals of the common mode feedback amplifier unit at the reference signal. The common mode feedback amplifier unit includes a differential amplifier having two differential input terminals and two differential output terminals. The combining circuit includes two sets of gain amplifier to receive and combine the output signals from the common mode feedback circuit and outputs two differential signals.