Patents Assigned to Taiwan Semicconductor Manufacturing Company, Ltd.
  • Publication number: 20130272056
    Abstract: A memory cell comprises a first word line in a first interconnect layer, a first VSS line, a first bit line, a power source line, a second bit line and a second VSS line formed a second interconnect layer, a second word line in a third interconnect layer. The memory cell further comprises a word line strap structure formed between the power source line and the second bit line, wherein the word line strap structure couples the first word line and the second word line.
    Type: Application
    Filed: April 13, 2012
    Publication date: October 17, 2013
    Applicant: Taiwan Semicconductor Manufacturing Company, Ltd.
    Inventor: Jhon-Jhy Liaw