Abstract: A device and a method of manufacture of a semiconductor device on a semiconductor substrate is provided. An N+ source layer is formed on the surface of the semiconductor substrate. A dielectric layer is formed on the surface of the source layer. The dielectric layer is patterned and etched forming a dielectric layer pattern with openings therein, a silicon epitaxial layer in the openings in the dielectric layer pattern. An N+ drain layer is formed on the surface of the silicon epitaxial layer. A second dielectric layer is formed on the surface of the device including the N+ drain layer. A conductor layer is formed and patterned containing silicon over the second dielectric layer. An N+ implant mask with an N+ opening over a region of the epitaxial layer is formed (source) and ion implanting through that N+ opening into the N+ implant mask in that region. A code implant mask over the conductor layer is formed and ions are implanted through the code implant mask into the device.
Abstract: The surface of a partially manufactured integrated circuit is cleaned by successive immersions in a series of specially formulated baths. Metallic films deposited on surfaces that have been cleaned in this manner do not exhibit subsequent peeling or blistering and have low electrical contact resistance to the surface onto which they were deposited.