Abstract: A method of determining an effective capacitance of a ring oscillator free of short current. The method comprises determining a frequency of an oscillator signal communicated from a ring oscillator to an inverter via a first communication path. The first communication path has connectivity to a first voltage source, a ground path and the inverter. The first communication path is divided into a second communication path and a third communication path. The method further comprises determining a voltage line current. The method additionally comprises determining an effective capacitance of the ring oscillator based on a first voltage of the first voltage source, the voltage line current and the frequency of the oscillator signal communicated to the inverter along the third communication path.

Abstract: A sense amplifier circuit includes a precharge circuit configured to precharge a bit line coupled to a sensing node in response to a precharge control signal and a sense output circuit. The sense output circuit includes a sense output inverter coupled to the sensing node. The sense output inverter is disabled during bit line precharging and for a period after bit line precharging is complete, and thereafter the sense output inverter is enabled.

Abstract: A semiconductor structure and a method for its manufacture are provided. In one example, the structure includes a well region doped with a first type dopant (e.g., a P-type or N-type dopant). A gate pedestal formed over the well region has two ends, one of which at least partially overlies the well region and is doped with the first type dopant. A dielectric layer is positioned between the gate pedestal and the well region. Source and drain regions formed on opposite sides of the gate pedestal within the well region are doped with a second type dopant opposite in type to the first type dopant.

Abstract: A method for fabricating thin film transistors (TFTS) for SRAM devices is described having metal shields over the channel regions for improved electrical characteristics. The method involves forming N.sup.+ doped polysilicon TFT gate electrodes having a gate oxide thereon. An N.sup.- doped amorphous silicon is deposited and recrystallized. The recrystallized silicon is P.sup.+ doped to form the TFT source/drain areas and patterned to form the N.sup.- doped channel regions with P.sup.+ source/drain areas. After depositing an insulating layer, a metal layer is deposited and patterned to completely cover and shield the TFT channel regions from ion damage during the plasma hydrogenation which is subsequently performed. The patterned metal layer also serves as the bit lines for the SRAM device. The plasma hydrogenation reduces the surface states at the gate oxide channel interface, while the shielding effect of the metal layer from ion damaging radiation reduces the off current (I.sub.off), increases the I.sub.