Abstract: Among other things, techniques and systems are provided for activating a memory cell of a memory arrangement in preparation for at least one of a read operation or write operation. The memory arrangement comprises a word-line driver comprising at least a first input terminal and a second input terminal. The first input terminal is operably coupled to a first decoder and the second input terminal is operably coupled to a second decoder. When the word-line driver senses a first voltage at the first input terminal and a second voltage at the second input terminal, the word-line driver outputs a gate voltage signal which activates the memory cell.
Type:
Grant
Filed:
October 19, 2015
Date of Patent:
January 3, 2017
Assignee:
Taiwan Semiconductor Manufacturing Company Limi