Patents Assigned to Taiwan Semiconductor Manufacturing Company Limited and National Chiao-Tung University
  • Patent number: 11437235
    Abstract: Methods and structures includes providing a substrate, forming a prelayer over a substrate, forming a barrier layer over the prelayer, and forming a channel layer over the barrier layer. Forming the prelayer may include growing the prelayer at a graded temperature. Forming the barrier layer is such that the barrier layer may include GaAs or InGaAs. Forming the channel layer is such that the channel layer may include InAs or an Sb-based heterostructure. Thereby structures are formed.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: September 6, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited & National Chiao-Tung University
    Inventors: Hung-Wei Yu, Yi Chang, Tsun-Ming Wang
  • Patent number: 10049872
    Abstract: A method includes providing a substrate, forming a prelayer over a substrate, forming a barrier layer over the prelayer, and forming a channel layer over the barrier layer. Forming the prelayer may include growing the prelayer at a graded temperature. Forming the barrier layer is such that the barrier layer may include GaAs or InGaAs. Forming the channel layer is such that the channel layer may include InAs or an Sb-based heterostructure.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: August 14, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company Limited & National Chiao-Tung University
    Inventors: Hung-Wei Yu, Yi Chang, Tsun-Ming Wang
  • Patent number: 9349806
    Abstract: Disclosed is a semiconductor structure comprising a single crystal substrate, a channel layer formed above the substrate from a transition metal dichalcogenides (TMDC) material, and a single crystal epitaxial buffer layer formed between the substrate and the channel layer, wherein the buffer layer is formed from material having a lattice constant mismatch of less than 5% with the lattice constant of the channel layer material. Also, disclosed is a method of forming a semiconductor structure comprising selecting a substrate formed from a single crystal material, preparing the substrate for template growth, growing a template on the substrate wherein the template is formed from single crystal material, and growing channel material on the template wherein the channel material is formed from a TMDC material and wherein the buffer layer material has a lattice constant mismatch of less than 5% with the lattice constant of the channel layer material.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: May 24, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited and National Chiao-Tung University
    Inventors: Yen-Teng Ho, Yi Chang