Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming semiconductor fins on a substrate. A first dummy gate is formed over the semiconductor fins. A recess is formed in the first dummy gate, and the recess is disposed between the semiconductor fins. A dummy fin material is formed in the recess. A portion of the dummy fin material is removed to expose an upper surface of the first dummy gate and to form a dummy fin. A second dummy gate is formed on the exposed upper surface of the first dummy gate.
Type:
Grant
Filed:
October 27, 2020
Date of Patent:
December 6, 2022
Assignee:
TAIWAN SEMICONDUTOR MANUFACTURING COMPANY LIMITED
Abstract: A semiconductor device includes a first semiconductor fin extending along a first direction. The semiconductor device includes a second semiconductor fin also extending along the first direction. The semiconductor device includes a dielectric structure disposed between the first and second semiconductor fins. The semiconductor device includes a gate isolation structure vertically disposed above the dielectric structure. The semiconductor device includes a metal gate layer extending along a second direction perpendicular to the first direction, wherein the metal gate layer includes a first portion straddling the first semiconductor fin and a second portion straddling the second semiconductor fin. The gate isolation structure separates the first and second portions of the metal gate layer from each other and includes a bottom portion extending into the dielectric structure.
Type:
Application
Filed:
February 3, 2021
Publication date:
October 28, 2021
Applicant:
Taiwan Semicondutor Manufacturing Company Limited
Inventors:
Shih-Yao Lin, Chih-Han Lin, Shu-Yuan Ku, Shu-Uei Jang, Ya-Yi Tsai, I-Wei Yang
Abstract: A semiconductor memory device comprising a plurality of memory cells configured to store digital data and an input multiplexer configured to enable the selection of a particular memory cell from the plurality of memory cells. The semiconductor memory device further comprises a read/write driver circuit configured to read data from the selected memory cell and write data to the selected memory cell, and a write logic block configured to provide logical control to the read/write driver circuit for writing data to the selected of memory cell. The read/write driver circuit may be coupled to the read/write input multiplexer by a data line and an inverted data line and the read and the write operations to the selected memory cell occur over the same data line and inverted data line.
Type:
Grant
Filed:
May 16, 2018
Date of Patent:
December 17, 2019
Assignee:
Taiwan Semicondutor Manufacturing Company Limited