Abstract: A device for recognizing and measuring the lengths of glitches by sampling the input signal at fractions of a sampling clock, which clock has a period shorter than the period of pulses of the correct signal but longer than the glitch widths. The corrected input signal can be displayed, along with the glitch information.
Type:
Grant
Filed:
December 17, 1982
Date of Patent:
January 22, 1985
Assignee:
Takeda Riker Co. Ltd.
Inventors:
Koji Nakagomi, Tetsuo Aoki, Takayuki Nakajima