Patents Assigned to Taray Technologies
  • Netlist synthesis and automatic generation of PC board schematics
    Patent number: 7562331
    Abstract: A computer implemented method and system for automatically generating a net list for a printed circuit board are described. Selection of one or more pins on a first and second component to be connected is based on one or more of a logical definition, an electrical definition, a distance property, and a programmable constraint. Once pins of the first and second connections are selected and connected, a net list is automatically generated. The net list includes information associated with the first component, information associated with the second component and at least one pin of the second component.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: July 14, 2009
    Assignee: Taray Technologies (India) Private Limited
    Inventors: Nagesh Chandrasekaran Gupta, Bhupesh Bharde, Qamar Alam, Subramaniam Kaitharam, Avik Chakraborty
  • NETLIST SYNTHESIS AND AUTOMATIC GENERATION OF PC BOARD SCHEMATICS
    Publication number: 20080244498
    Abstract: A computer implemented method and system for automatically generating a net list for a printed circuit board are described. Selection of one or more pins on a first and second component to be connected is based on one or more of a logical definition, an electrical definition, a distance property, and a programmable constraint. Once pins of the first and second connections are selected and connected, a net list is automatically generated. The net list includes information associated with the first component, information associated with the second component and at least one pin of the second component.
    Type: Application
    Filed: April 10, 2008
    Publication date: October 2, 2008
    Applicant: Taray Technologies (India) Private Limited
    Inventors: Nagesh Chandrasekaran Gupta, Bhupesh Bharde, Qamar Alam, Subramaniam Kaitharam, Avik Chakraborty
  • Netlist synthesis and automatic generation of PC board schematics
    Patent number: 7398500
    Abstract: A computer implemented method and system for automatically generating a net list for a printed circuit board are described. Selection of one or more pins on a first and second component to be connected is based on one or more of a logical definition, an electrical definition, a distance property, and a programmable constraint. Once pins of the first and second connections are selected and connected, a net list is automatically generated. The net list includes information associated with the first component, information associated with the second component and at least one pin of the second component.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: July 8, 2008
    Assignee: Taray Technologies
    Inventors: Nagesh Chandrasekaran Gupta, Bhupesh Bharde, Qamar Alam, Subramaniam Kaitharam, Avik Chakraborty