Patents Assigned to Taray Technologies (India) Private Limited
  • Patent number: 7562331
    Abstract: A computer implemented method and system for automatically generating a net list for a printed circuit board are described. Selection of one or more pins on a first and second component to be connected is based on one or more of a logical definition, an electrical definition, a distance property, and a programmable constraint. Once pins of the first and second connections are selected and connected, a net list is automatically generated. The net list includes information associated with the first component, information associated with the second component and at least one pin of the second component.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: July 14, 2009
    Assignee: Taray Technologies (India) Private Limited
    Inventors: Nagesh Chandrasekaran Gupta, Bhupesh Bharde, Qamar Alam, Subramaniam Kaitharam, Avik Chakraborty
  • Publication number: 20090178017
    Abstract: A method for connecting a programmable device (PD) and an electronic component (EC) based on a protocol, including: obtaining a signal group of the protocol having a group constraint, a first pin definition including an electrical constraint and a logical constraint, and a second pin definition; mapping the first pin definition to a first pin of the PD based on the electrical constraint, the logical constraint, and the group constraint; identifying a first pin of the EC to connect with the first pin of the PD based on the electrical constraint, the logical constraint, the group constraint, and a connection preference; generating a first connection between the first pin of the EC and a second pin of the PD based on the electrical constraint, the logical constraint, the group constraint, and the connection preference; and storing the first connection in an edge list.
    Type: Application
    Filed: January 9, 2009
    Publication date: July 9, 2009
    Applicant: TARAY TECHNOLOGIES (INDIA) PRIVATE LIMITED
    Inventors: Nagesh Chandrasekaran Gupta, Ravi Srinivasa Vedula
  • Publication number: 20080244498
    Abstract: A computer implemented method and system for automatically generating a net list for a printed circuit board are described. Selection of one or more pins on a first and second component to be connected is based on one or more of a logical definition, an electrical definition, a distance property, and a programmable constraint. Once pins of the first and second connections are selected and connected, a net list is automatically generated. The net list includes information associated with the first component, information associated with the second component and at least one pin of the second component.
    Type: Application
    Filed: April 10, 2008
    Publication date: October 2, 2008
    Applicant: Taray Technologies (India) Private Limited
    Inventors: Nagesh Chandrasekaran Gupta, Bhupesh Bharde, Qamar Alam, Subramaniam Kaitharam, Avik Chakraborty