Patents Assigned to Tawain Semiconductor Manufacturing Co., Ltd.
  • Patent number: 9859427
    Abstract: A semiconductor device includes a substrate, a fin structure disposed over the substrate and including a channel region and a source/drain region, a gate structure disposed over at least a portion of the fin structure, the channel region being beneath the gate structure and the source/drain region being outside of the gate structure, a strain material layer disposed over the source/drain region, the strain material layer providing stress to the first channel region, and a contact layer wrapping around the first strain material layer. A width of the source/drain region is smaller than a width of the channel region.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: January 2, 2018
    Assignee: Tawain Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Li Chiang, Cheng-Yi Peng, Jyh-Cherng Sheu, Yee-Chia Yeo
  • Publication number: 20030066545
    Abstract: A method and system for reducing acidic contamination on a process wafer following a plasma etching process including; providing an ambient controlled heating chamber for accepting transfer of a process wafer under controlled ambient conditions; transferring the process wafer to the heating chamber under controlled ambient conditions following plasma etching of the process wafer; providing a heat exchange surface within the heating chamber for mounting the process wafer in heat exchange relationship thereto; mounting the process wafer on a heat exchange surface contained within the heating chamber; and, heating the process wafer to a temperature sufficient to vaporize an acidic residue thereon to form acidic vapors; and, removing the acidic vapors from the heating chamber.
    Type: Application
    Filed: October 10, 2001
    Publication date: April 10, 2003
    Applicant: Tawain Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Yung Chang, Hsiang-Hsing Liu, Shiou Fieng-Chang Chien