Abstract: An image sensor capable of obtaining a high dynamic range without reducing a frame rate. An image sensor includes a pixel region where a plurality of pixels each including a sensor element that detects a naturally occurring physical quantity and converts the physical quantity into an electric signal are arranged in a row direction and a column direction, a row selection unit that selects any of the pixels in the pixel region in units of rows and contributes to readout of the electric signal from each of the pixels and resetting of an accumulated charge, a pixel readout unit that reads out the electric signal from each of the pixels selected by the row selection unit in column-parallel, and a column selection unit that selects the pixel in any column from a pixel row selected by the row selection unit and controls a charge accumulation amount of the selected pixel.

Abstract: An image sensor capable of obtaining a high dynamic range without reducing a frame rate. An image sensor includes a pixel region where a plurality of pixels each including a sensor element that detects a naturally occurring physical quantity and converts the physical quantity into an electric signal are arranged in a row direction and a column direction, a row selection unit that selects any of the pixels in the pixel region in units of rows and contributes to readout of the electric signal from each of the pixels and resetting of an accumulated charge, a pixel readout unit that reads out the electric signal from each of the pixels selected by the row selection unit in column-parallel, and a column selection unit that selects the pixel in any column from a pixel row selected by the row selection unit and controls a charge accumulation amount of the selected pixel.

Abstract: A time domain A/D converter group includes a plurality of individual A/D converters, each of the individual A/D converters is connected to a reference signal generation circuit to generate a first reference signal for sweeping in a full scale range and a second reference signal for repeating plurality of times to sweep in a limited voltage range, and each of the individual A/D converters includes a reference voltage selection circuit for switching the first reference signal or the second reference signal, a comparator for comparing an input signal with the first reference signal or the second reference signal, for generating a comparison output signal, an internal A/D converter for performing an A/D conversion using the comparison output signal from the comparator, and an accumulation adder-subtractor for outputting an average signal of A/D conversion values obtained from the A/D conversion when the second reference signal is selected.

Abstract: A time domain A/D converter group includes a plurality of individual A/D converters, each of the individual A/D converters is connected to a reference signal generation circuit to generate a first reference signal for sweeping in a full scale range and a second reference signal for repeating plurality of times to sweep in a limited voltage range, and each of the individual A/D converters includes a reference voltage selection circuit for switching the first reference signal or the second reference signal, a comparator for comparing an input signal with the first reference signal or the second reference signal, for generating a comparison output signal, an internal A/D converter for performing an A/D conversion using the comparison output signal from the comparator, and an accumulation adder-subtractor for outputting an average signal of A/D conversion values obtained from the A/D conversion when the second reference signal is selected.

Abstract: An A/D converter includes an analog input terminal, a successive approximation A/D converter connected to the analog input terminal, the successive approximation A/D converter for generating an upper conversion result at an upper conversion result terminal, the successive approximation A/D converter having an internal D/A converter generating an internal reference voltage at an internal reference voltage terminal, and a delta-sigma A/D converter connected to the analog input terminal and the internal reference voltage terminal, the delta-sigma A/D converter for generating a lower conversion result at a lower conversion result terminal.

Abstract: An integrator includes a first switch, a first capacitor, a second switch, a second capacitor, an amplifier, a third switch, a forth switch, a third capacitor, and a control circuit. The control circuit repeats a first phase and a second phase. In the first phase, the control circuit renders the first switch and the third switch to turn on and the second switch and the fourth switch to turn off. In the second phase, the control circuit renders the second switch and the fourth switch to turn on and the first switch and the third switch to turn off.