Abstract: A RFID tag configured with a Near Field Communication (NFC) protocol is sealed between water-resistant layers and affixed to a fabric. The NFC-configured tag can be programmed with instructions to automatically direct an electronic device to a web address by which means virtually any additional information can be communicated to the user of the electronic device. According to a method aspect, the NFC-configured tag is initially sealed between water-resistant layers. A compatible water-resistant layer is affixed to a fabric and then the sealed NFC-configured tag and a further water-resistant cover layer are affixed to the fabric over the previously-affixed compatible layer. The tag is then securely and permanently affixed to the fabric, with which the tag can be safely subjected to repeated wear and washing.

Abstract: A device to extract elements contained in a cavity, additional to patent of invention P060105329, and of preferable application to assistance at childbirth and/or extraction of elements seated in cavities of the human body, facilitating the task of medical professionals. Said device is comprised of a bag having one of its ends open, through which it is possible to introduce the element to be extracted, in which, in a first embodiment and on the outer surface of the bag and along all its circumference line, there is at least one air chamber being able to get in contact with the element to be extracted when receiving inner pressure, being said chamber connected to a pressure generating means; and in a second embodiment, an outward fold is defined on said bag, forming an annular cavity at the time it gets in contact with the cavity containing the element to be extracted.

Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.

Abstract: A method and apparatus for fabricating thin Group III nitride layers as well as Group III nitride layers that exhibit sharp layer-to-layer interfaces are provided. According to one aspect, an HVPE reactor includes one or more gas inlet tubes adjacent to the growth zone, thus allowing fine control of the delivery of reactive gases to the substrate surface. According to another aspect, an HVPE reactor includes both a growth zone and a growth interruption zone. According to another aspect, an HVPE reactor includes a slow growth rate gallium source, thus allowing thin layers to be grown. Using the slow growth rate gallium source in conjunction with a conventional gallium source allows a device structure to be fabricated during a single furnace run that includes both thick layers (i.e., utilizing the conventional gallium source) and thin layers (i.e., utilizing the slow growth rate gallium source).

Abstract: A method and apparatus for fabricating thin Group III nitride layers as well as Group III nitride layers that exhibit sharp layer-to-layer interfaces are provided. According to one aspect, an HVPE reactor includes one or more gas inlet tubes adjacent to the growth zone, thus allowing fine control of the delivery of reactive gases to the substrate surface. According to another aspect, an HVPE reactor includes both a growth zone and a growth interruption zone. According to another aspect, an HVPE reactor includes a slow growth rate gallium source, thus allowing thin layers to be grown. Using the slow growth rate gallium source in conjunction with a conventional gallium source allows a device structure to be fabricated during a single furnace run that includes both thick layers (i.e., utilizing the conventional gallium source) and thin layers (i.e., utilizing the slow growth rate gallium source).

Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.

Abstract: A method and apparatus for fabricating thin Group III nitride layers as well as Group III nitride layers that exhibit sharp layer-to-layer interfaces are provided. According to one aspect, an HVPE reactor includes one or more gas inlet tubes adjacent to the growth zone, thus allowing fine control of the delivery of reactive gases to the substrate surface. According to another aspect, an HVPE reactor includes both a growth zone and a growth interruption zone. According to another aspect, an HVPE reactor includes a slow growth rate gallium source, thus allowing thin layers to be grown. Using the slow growth rate gallium source in conjunction with a conventional gallium source allows a device structure to be fabricated during a single furnace run that includes both thick layers (i.e., utilizing the conventional gallium source) and thin layers (i.e., utilizing the slow growth rate gallium source).

Abstract: A method for fabricating p-type, i-type, and n-type mn-v compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.

Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.

Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.