Patents Assigned to Technologies Limited
  • Publication number: 20250062331
    Abstract: The invention relates to electrodes comprising a mixed niobium oxide as an active electrode material. The electrodes may be used in metal-ion batteries such as lithium-ion batteries. The mixed niobium oxide may have the formula MIx-uMy(x/(5-y))MVzNb100-(x/(5-y))-zO250-u/2, wherein: MI is a cation having an oxidation state of 1; My is a cation having an average oxidation state of y; MV is a cation having an average oxidation state of 5; 1?y?4; 0.5?x?6; 0?z?10; 0?u?5; x>u.
    Type: Application
    Filed: December 14, 2022
    Publication date: February 20, 2025
    Applicant: Echion Technologies Limited
    Inventors: Peter Slater, Daniel Martin, Alexander Groombridge
  • Publication number: 20250062385
    Abstract: A button cell includes a winding body, a first metal plate and a first layer. The winding body includes a first current collector. The first metal plate is connected to the first current collector at a first portion. The first layer covers the first portion. In the winding direction, the first layer includes a first side edge and a second side edge, the first side edge intersects with the first current collector at a first end point, and the second side edge intersects with the first current collector at a second end point. A line connecting the first end point and a winding central axis is defined as a first virtual line, a line connecting the second end point and the winding central axis is defined as a second virtual line, and an included angle between the first virtual line and the second virtual line is 54° to 66°.
    Type: Application
    Filed: November 5, 2024
    Publication date: February 20, 2025
    Applicant: Ningde Amperex Technology Limited
    Inventors: Huimin GAO, Qiao ZENG
  • Publication number: 20250063906
    Abstract: An organic electroluminescent device includes a first transistor, a power supply line layer connected to one current terminal of the first transistor, a capacitive element including a first capacitive electrode connected to a gate of the first transistor, and a second capacitive electrode, a signal line, and a pixel electrode connected to the other current terminal of the first transistor, the first capacitive electrode is provided on a layer over the gate of the first transistor, and the power supply line layer is provided on a layer between the first capacitive electrode and the signal line.
    Type: Application
    Filed: June 27, 2024
    Publication date: February 20, 2025
    Applicant: Lumitek Display Technology Limited
    Inventors: Hitoshi OTA, Ryoichi NOZAWA
  • Publication number: 20250062409
    Abstract: An electrolyte including a dinitrile compound, a trinitrile compound, and propyl propionate. Based on the total weight of the electrolyte, the weight percentage of the dinitrile compound is X, the weight percentage of the trinitrile compound is Y, and the weight percentage of the propyl propionate is Z, wherein, about 3 wt %?(X+Y)? about 11 wt %, about 0.5<(X/Y)?about 6, about 2 wt %<Y<about 5 wt %, and about 0.01<(Y/Z)?about 0.3; the trinitrile compound includes at least one selected from the group of 1,3,5-pentanetricarbonitrile; 1,2,3-propanetrinitrile, 1,3,6-hexanetricarbonitrile; 1,2,6-hexanetricarbonitrile, 1,2,3-tris(2-cyanoethoxy)propane; 1,2,4-tris(2-cyanoethoxy)butane, 1, 1,1-tris(cyanoethoxymethylene)ethane, 1,1,1-tris(cyanoethoxymethylene)propane, 3-methyl-1,3,5-tris(cyanoethoxy)pentane, 1,2,7-tris(cyanoethoxy)heptane, 1,2,6-tris(cyanoethoxy)hexane, and 1,2,5-tris(cyanoethoxy)pentane.
    Type: Application
    Filed: November 5, 2024
    Publication date: February 20, 2025
    Applicant: Ningde Amperex Technology Limited
    Inventors: Kefei WANG, Qiao ZENG, Liangzhen XIAO, Fei WU
  • Publication number: 20250060639
    Abstract: A device comprising liquid crystal material contained directly between a first control component including a stack of layers defining electrical control circuitry and a polariser component. The device further includes liquid crystal material contained directly between the polariser component and another control component including another stack of layers defining further electrical control circuitry.
    Type: Application
    Filed: November 4, 2024
    Publication date: February 20, 2025
    Applicant: Flexenable Technology Limited
    Inventor: Matthew James Harding
  • Publication number: 20250062408
    Abstract: An electrolyte including a dinitrile compound, a trinitrile compound, and propyl propionate. Based on the total weight of the electrolyte, the weight percentage of the dinitrile compound is X, the weight percentage of the trinitrile compound is Y, and the weight percentage of the propyl propionate is Z, wherein, about 3 wt %?(X+Y)?about 11 wt %, about 1?(X/Y)?about 6, and about 0.01<(Y/Z)?about 0.3; the trinitrile compound includes at least one selected from the group of 1,3,5-pentanetricarbonitrile; 1,2,3-propanetrinitrile, 1,3,6-hexanetricarbonitrile; 1,2,6-hexanetricarbonitrile, 1,2,3-tris(2-cyanoethoxy)propane; 1,2,4-tris(2-cyanoethoxy)butane, 1,1,1-tris(cyanoethoxymethylene)ethane, 1,1,1-tris(cyanoethoxymethylene)propane, 3-methyl-1,3,5-tris(cyanoethoxy)pentane, 1,2,7-tris(cyanoethoxy)heptane, 1,2,6-tris(cyanoethoxy)hexane, and 1,2,5-tris(cyanoethoxy)pentane.
    Type: Application
    Filed: November 5, 2024
    Publication date: February 20, 2025
    Applicant: Ningde Amperex Technology Limited
    Inventors: Kefei WANG, Qiao ZENG, Liangzhen XIAO, Fei WU
  • Publication number: 20250062497
    Abstract: A secondary battery includes a positive electrode plate, a negative electrode plate, an electrolyte, and a separator. The separator includes a base film, where a pore size distribution of the base film is a bimodal distribution. A pore size on a side of the base film facing the negative electrode plate is larger than a pore size on a side of the base film facing the positive electrode plate. The pore size on the side of the base film facing the negative electrode plate is 60 nm to 500 nm, and the pore size on the side of the base film facing the positive electrode plate is 5 nm to 55 nm. This can improve the fast charging performance of the secondary battery and alleviate lithium precipitation.
    Type: Application
    Filed: August 16, 2024
    Publication date: February 20, 2025
    Applicant: Ningde Amperex Technology Limited
    Inventors: Gengjin KONG, Zengbin WEI, Xinghua TAO
  • Publication number: 20250062410
    Abstract: An electrolyte including a dinitrile compound, a trinitrile compound, and propyl propionate. Based on the total weight of the electrolyte, the weight percentage of the dinitrile compound is X, the weight percentage of the trinitrile compound is Y, and the weight percentage of the propyl propionate is Z, wherein, about 3 wt %<(X+Y)?about 11 wt %, about 0.1?(X/Y)?about 6, about 2 wt %<X?about 6 wt %, and about 0.01?(Y/Z)?about 0.3; the trinitrile compound includes at least one selected from the group of 1,3,5-pentanetricarbonitrile; 1,2,3-propanetrinitrile, 1,3,6-hexanetricarbonitrile; 1,2,6-hexanetricarbonitrile, 1,2,3-tris(2-cyanoethoxy)propane; 1,2,4-tris(2-cyanoethoxy)butane, 1,1,1-tris(cyanoethoxymethylene)ethane, 1,1,1-tris(cyanoethoxymethylene)propane, 3-methyl-1,3,5-tris(cyanoethoxy)pentane, 1,2,7-tris(cyanoethoxy)heptane, 1,2,6-tris(cyanoethoxy)hexane, and 1,2,5-tris(cyanoethoxy)pentane.
    Type: Application
    Filed: November 5, 2024
    Publication date: February 20, 2025
    Applicant: Ningde Amperex Technology Limited
    Inventors: Kefei WANG, Qiao ZENG, Liangzhen XIAO, Fei WU
  • Publication number: 20250062496
    Abstract: An electrochemical device, including a first housing, a second housing, and a first separation piece. The first separation piece is disposed between the first housing and the second housing. A first cavity and a second cavity are disposed on two sides of the first separation piece of the electrochemical device respectively. The first separation piece includes a first substrate layer and a first sealing material layer located on a surface of the first substrate layer. The electrochemical device satisfies: 1.2?Fs11/F11?15, where F11 is a peel force between the first sealing material layer and the first substrate layer, and Fs11 is a peel force between the first housing and the first sealing material layer. This arrangement can reduce the risk of bursting the seal interface when the electrochemical device is impacted such as dropped, thereby improving the safety and reliability of the electrochemical device.
    Type: Application
    Filed: November 6, 2024
    Publication date: February 20, 2025
    Applicant: Ningde Amperex Technology Limited
    Inventors: Chenchen LI, Ping HE, Daolin LIU
  • Patent number: 12226223
    Abstract: Systems and methods are provided for a multi-modal sleep system comprising a data processor for operating in a plurality of operating modes. The data processor may detect at least one sensor providing data to the data processor and determine a sensor type associated with each of the at least one sensor. The data processor may select a mode of operation based on the determined sensor type of the detected at least one sensor and of each of the at least one sensor. A first of the plurality of operating modes may be selected in response to determining that the at least one detected sensor includes a first sensor type or combination of sensor types. The data processor may be configured to receive data from the at least one detected sensor and process the received data according to the selected mode of operation to output a characterization of a user's sleep.
    Type: Grant
    Filed: July 15, 2022
    Date of Patent: February 18, 2025
    Assignee: ResMed Sensor Technologies Limited
    Inventor: Benjamin Rubin
  • Patent number: 12230674
    Abstract: A high voltage superjunction MOSFET includes a semiconductor substrate and a semiconductor layer having columns of first and second conductivity. A buffer layer of the first conductivity is between the semiconductor substrate and semiconductor layer. A plug region of the second conductivity is formed at a semiconductor layer surface and extends to the columns. A source/drain region is formed at the semiconductor layer surface and is connected to the plug region. The source/drain region has a concentration of the first conductivity between about 1×1019 cm?3 and 1.5×1020 cm?3. A body region of the second conductivity is between the source/drain region and the first column and is connected to the plug region. A gate trench is formed in the semiconductor layer surface and extends toward the first column and has a trench gate electrode disposed therein. A dielectric layer separates the trench gate electrode from the first column.
    Type: Grant
    Filed: July 25, 2023
    Date of Patent: February 18, 2025
    Assignee: IceMos Technology Limited
    Inventors: Kiraneswar Muthuseenu, Samuel Anderson, Takeshi Ishiguro
  • Patent number: 12229868
    Abstract: Ray tracing, and more generally, graphics operations taking place in a 3-D scene, involve a plurality of constituent graphics operations. Responsibility for executing these operations can be distributed among different sets of computation units. The sets of computation units each can execute a set of instructions on a parallelized set of input data elements and produce results. These results can be that the data elements can be categorized into different subsets, where each subset requires different processing as a next step. The data elements of these different subsets can be coalesced so that they are contiguous in a results set. The results set can be used to schedule additional computation, and if there are empty locations of a scheduling vector (after accounting for the members of a given subset), then those empty locations can be filled with other data elements that require the same further processing as that subset.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: February 18, 2025
    Assignee: Imagination Technologies Limited
    Inventors: Luke T. Peterson, James A. McCombe, Ryan R. Salsbury, Stephen Purcell
  • Patent number: 12229851
    Abstract: A graphics processing unit configured to process graphics data using a rendering space which is sub-divided into a plurality of tiles, the graphics processing unit comprising: a plurality of processing cores configured to render graphics data; cost indication logic configured to obtain a cost indication for each of a plurality of sets of one or more tiles of the rendering space, wherein the cost indication for a set of one or more tiles is suggestive of a cost of processing the set of one or more tiles; similarity indication logic configured to obtain similarity indications between sets of one or more tiles of the rendering space, wherein the similarity indication between two sets of one or more tiles is indicative of a level of similarity between the two sets of tiles according to at least one processing metric; and scheduling logic configured to assign the sets of one or more tiles to the processing cores for rendering in dependence on the cost indications and the similarity indications.
    Type: Grant
    Filed: October 30, 2023
    Date of Patent: February 18, 2025
    Assignee: Imagination Technologies Limited
    Inventors: Rudi Bonfiglioli, Richard Broadhurst
  • Patent number: 12231138
    Abstract: An interleaved Analog-to-Digital Converter (ADC) has a reference channel receiving an attenuated analog input. The reference channel is also calibrated to remove capacitor-ratio mismatch, static, and dynamic mismatches and produces a linear replica of the data channels with negligible nonlinear errors due to attenuation. Nonlinear errors on the data channels are corrected by Harmonic Distortion HD2 and HD3 coefficients. A counter increments when the sign bit of a nonlinear-corrected channel code is negative. The count is doubled and reduced by a number of samples to generate a HD2 cost function that adjusts the HD2 coefficient in a LMS loop. A HD3 correlation is generated by multiplying the reference channel output by its difference with the nonlinear-corrected channel code. The sign of the correlation code increments a second counter which generates a HD3 cost function whose sign bit adjusts the HD3 coefficient. These 2 counters generate cost functions, eliminating sample storage.
    Type: Grant
    Filed: June 6, 2023
    Date of Patent: February 18, 2025
    Assignee: Caelus Technologies Limited
    Inventor: Chi Fung Lok
  • Patent number: 12226190
    Abstract: An apparatus, system, and method are disclosed for monitoring the motion, breathing, heart rate of humans in a convenient and low-cost fashion, and for deriving and displaying useful measurements of cardiorespiratory performance from the measured signals. The motion, breathing, and heart rate signals are obtained through a processing applied to a raw signal obtained in a non-contact fashion, typically using a radio-frequency sensor. Processing into separate cardiac and respiratory components is described. The heart rate can be determined by using either spectral or time-domain processing. The respiratory rate can be calculated using spectral analysis. The sensor, processing, and display can be incorporated in a single device which can be worn or held close to the body while exercising, or alternately placed in a fixed piece of exercise equipment at some distance form the body, and may also be integrated with other sensors, such as position locators.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: February 18, 2025
    Assignee: ResMed Sensor Technologies Limited
    Inventors: Philip De Chazal, Conor Hanley, Conor Heneghan
  • Patent number: 12226764
    Abstract: A catalyst carrier for insertion in a reactor tube of a tubular reactor, said catalyst carrier comprising: a container for holding catalyst in use, said container having a bottom surface closing the container, and a top surface; a carrier outer wall extending from the bottom surface to the top surface; a seal extending from the container by a distance which extends beyond the carrier outer wall; said carrier outer wall having apertures located below the seal.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: February 18, 2025
    Assignee: Johnson Matthey Davy Technologies Limited
    Inventor: Julian Gray
  • Patent number: 12232196
    Abstract: The present disclosure provides systems and methods which increase the throughput of a TCP-based communication between a first network node and a second network node. First, the first network node sent a first plurality of TCP segments to the second network node. Second, when the second network node receives a second plurality of TCP segments, which is all or part of the first plurality of the TCP segments, the second network node responds by sending one or more TCP acknowledgements to the first network node with the last sequence number of a last segment among all TCP segment within the second plurality of TCP segments. The present disclosure are able to increase the throughput of a TCP connection while decreasing its reliability.
    Type: Grant
    Filed: November 13, 2023
    Date of Patent: February 18, 2025
    Assignee: Pismo Labs Technology Limited
    Inventors: Patrick Ho Wai Sung, Kam Chiu Ng, Wan Chun Leung
  • Patent number: 12229865
    Abstract: In some aspects, systems and methods provide for forming groupings of a plurality of independently-specified computation workloads, such as graphics processing workloads, and in a specific example, ray tracing workloads. The workloads include a scheduling key, which is one basis on which the groupings can be formed. Workloads grouped together can all execute from the same source of instructions, on one or more different private data elements. Such workloads can recursively instantiate other workloads that reference the same private data elements. In some examples, the scheduling key can be used to identify a data element to be used by all the workloads of a grouping. Memory conflicts to private data elements are handled through scheduling of non-conflicted workloads or specific instructions and/or deferring conflicted workloads instead of locking memory locations.
    Type: Grant
    Filed: April 11, 2023
    Date of Patent: February 18, 2025
    Assignee: Imagination Technologies Limited
    Inventors: Luke T. Peterson, James A. McCombe, Steven J. Clohset, Jason R. Redgrave
  • Patent number: 12229002
    Abstract: An error detection circuit and a method for performing a cyclic redundancy check on a clock gated register signal are disclosed. The error detection circuit comprising a first register, a check bit processing logic and an error detection module. The first register is a clock gated register configured to be updated with a data signal (x) in response to a clock enabling signal. The check bit processing logic configured to, in response to a control signal, update a second register with a check bit, wherein the control signal (b) is the same as the clock enabling signal. The error detection module configured for calculating an indication bit based on at least the output of the first register and the output of the second register.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: February 18, 2025
    Assignee: Imagination Technologies Limited
    Inventors: Faizan Nazar, Kenneth Rovers
  • Patent number: 12229105
    Abstract: A hardware-implemented method of indexing data elements in a source array is provided. The method comprises generating a number of shifted copy arrays; receiving indices for indexing the source array; and retrieving one or more data elements from the shifted copy arrays, according to the received indices. Also disclosed is a related processing system comprising a memory and hardware for indexing data elements in a source array in the memory.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: February 18, 2025
    Assignee: Imagination Technologies Limited
    Inventors: Aria Ahmadi, Cagatay Dikici