Abstract: A locknut system having a projecting screw threaded member with a first external thread. A nut is mountable on the projecting screw threaded member by means of a corresponding thread. A second different screw thread is formed on the projecting screw threaded member. The second screw thread is of a different hand or a different pitch from the first screw thread. A locking member has a screw thread for engagement with the second screw thread of the projecting screw threaded member and has an engaging surface which can be brought into abutting contact with a corresponding engaging surface on the nut by mating the thread of the locking member with the second thread of the projecting screw threaded member. A coupling member operates to couple the locking member and the nut to substantially prevent relative rotation there between.

Abstract: A phased array antenna system with variable electrical tilt comprises an array of antenna elements etc. incorporating a divider dividing a radio frequency (RF) carrier signal into two signals between which a phase shifter introduces a variable phase shift. A phase to power converter converts the phase shifted signals into signals with powers dependent on the phase shift. Power splitters divide the converted signals into two sets of divided signals with total number equal to the number of antenna elements in the array. Power to phase converters etc. combine pairs of divided signals from different power splitters this provides vector sum and difference components with appropriate phase for supply to respective pairs of antenna elements etc. located equidistant from an array center. Adjustment of the phase shift provided by phase shifter changes the angle of electrical tilt of the antenna array.

Abstract: A gate driver including a shift register, a level shifter, an output buffer, and a processing unit. The shift register generates a shifted signal. The level shifter generates a level signal according to a first operation voltage, a second operation voltage and the shifted signal. The output buffer provides a scan signal according to the level signal. The processing unit controls the level signal to follow the second operation voltage when the first operation voltage equals to a first preset value and the second operation voltage is higher than a second preset value less than the first preset value.

Abstract: There is disclosed apparatus for supporting a disk drive, disk drive test apparatus and a method of testing a disk drive. The apparatus for supporting a disk drive includes: a housing, a slot for receiving a disk drive, and a plurality of isolators. The slot is received in the housing and has a longitudinal axis. The isolators are disposed between the slot and the housing for isolating the slot from the housing. The isolators are arranged with respect to the longitudinal axis such that the slot has a low rotational stiffness in the direction of the longitudinal axis relative to the rotational stiffness in at least one other direction.

Abstract: There is disclosed in aspects of the invention a method of evaluating the profit of a substream of encoded video data, a method of operating servers, a network and an apparatus. In the method, a data portion is identified comprising at least some of the data in the substream being evaluated; comparing a decoded version of the video with the data portion present and a decoded version of the video with the data portion removed and calculating an error metric indicative of the distortion between the two versions; and, calculating a profit for the substream dependent upon the error metric.

Abstract: A driving circuit and a liquid crystal display using the same. In the driving circuit, a first switch and a second switch are provided in a VCOM driver thereof. The first switch is designed to be turned on to a ground a VCOM terminal of a display capacitor, and the second switch is designed to be turned on to couple a constant voltage level DC VCOM to the VCOM terminal of the display capacitor. In addition, a timing controller of the driving circuit is designed for reducing power consumption, which controls the statuses of the first and second switches and determines when to allow a positive polarity voltage to be coupled to the display capacitor to charge the display capacitor for positive polarity display.

Abstract: A bit block transfer (Bitblt) circuit includes a read register, a write register, a bit shifting circuit and an overflowing register. The read register stores decomposition data including original data. The bit shifting circuit shifts the decomposition data in the read register to the write register and shifts bits of the decomposition data in the write register such that an initial bit of the original data of the decomposition data is situated apart from an initial address of the write register by a bit-shifting amount. The overflowing register coupled to the write register stores overflowing data of the original data overflowing from a memory length of the write register when the bits of the decomposition data in the write register are being shifted. The write register outputs and writes the decomposition data therein to a memory cell of a first memory.

Abstract: Systems, methods, and apparatus for embroidery thread color management are disclosed. An example method comprises determining a first set of thread colors to be used in an embroidery design, determining a second set of thread colors assigned to a first embroidery machine, determining a third set of thread colors assigned to a second embroidery machine, determining a first difference of the number of thread colors in the first set of thread colors that are not in the second set of thread colors, determining a second difference of the number of thread colors in the first set of thread colors that are not in the third set of thread colors, and assigning the embroidery design to a queue for the first embroidery machine when the first difference is smaller than the second difference.

Abstract: The invention provides an integrated circuit with reduced electromagnetic interference induced by memory access. The integrated circuit includes a random code generator, a request receiver and a memory unit. The random code generator generates a plurality of random codes according to a predetermined delay parameter. The request receiver obtains an input clock signal according to a plurality of data requests and spreads the spectrum of the input clock signal based on the random codes to derive a non-periodic output clock signal. The memory unit accesses image data to be displayed in response to the data requests and the output clock signal.

Abstract: A system for supporting OLAP analysis over a network. The system comprises an OLAP server for enabling an OLAP user to perform OLAP analysis via interaction with a client machine on the network. The system also includes a data aggregation module comprising a multi-dimensional datastore, an aggregation engine integrated with the multi-dimensional datastore, and a first interface for loading base data from a data source to the aggregation engine. The aggregation engine performs data aggregation operations on loaded base data, generates aggregated data from the base data, and stores the aggregated data in the multi-dimensional datastore. A second interface receives requests for OLAP analysis from the OLAP server, accesses the aggregation engine to retrieve from the multi-dimensional datastore, aggregated data corresponding to requests, and communicates the retrieved aggregated data to the OLAP server for query servicing, in a manner transparent to the OLAP user.

Abstract: A driver circuit includes a mode control unit and a plurality of source drivers to drive a display panel including N pixel cells on each scan line. Each source driver has M driving channels, and a first subset of the driving channels and a second subset of the driving channels are respectively in a first mode and a second mode according to a preset mode sequence, wherein M?N. The 1st through Nth driving channels of a first source driver and the Mth through (M?N+1)th driving channels of a second source driver respectively drive the 1st through Nth pixel cells during a first scan period and a second scan period. The modes of the Mth through 1st driving channels of the second source driver are respectively altered to match the modes of the 1st through Mth driving channels of the first source driver by the mode control unit.

Abstract: An air compressor assembly is disclosed. The air compressor assembly includes a substantially curved frame including a lower frame portion and an upper frame portion, a fluid tank carried by the lower frame portion, a compressor mechanism carried by the lower frame portion, and a storage bin including an engagement mechanism releasably coupled to the upper frame portion.

Abstract: A design image is transformed into a projection design image comprising the design image as it will appear when projected onto a physical 3-dimensional (3-D) curved object. In an embodiment, pixels of the design image are mapped into corresponding mapped pixels in a projection design image according to how the design image will appear in a flattened image of the design projected or printed onto the object having 3-dimension curves. The projection design image may be combined with a product image of the object having 3-dimension curves to generate a customized product image of the object having 3-dimension curves incorporating the design image. The customized product image is displayed to a user when customizing a product with a design to ensure that the user understands how the physical product will appear when the design is printed or projected onto the physical product.

Abstract: A source driver and a driving method thereof are provided. The source driver is adapted to a display panel. The source driver includes an output buffer and a regulating unit. The output buffer has an input terminal and an output terminal. The input terminal of the output buffer receives a pixel signal. The output terminal of the output buffer is coupled to the display panel for outputting an output signal. The regulating unit is coupled to the output terminal of the output buffer, for providing a charging current or a discharging current to the output terminal of the output buffer according to a polarity of the pixel signal. Thereby, a slew rate of the output signal is increased.

Abstract: A driver circuit includes a mode control unit and a plurality of source drivers to drive a display panel including pixel cells on each scan line. Each source driver has M driving channels, and two subsets of the driving channels are respectively in a first mode and a second mode according to a preset mode sequence. The 1st through Nth driving channels of each of first source drivers and the Mth through (M?N+1)th driving channels of each of second source drivers respectively drive the pixel cells during a first scan period and a second scan period, wherein M?N. The modes of the Mth through 1st driving channels of the second source drivers are respectively altered to match the modes of the 1st through Mth driving channels of the first source drivers by the mode control unit.

Abstract: A method of modelling fabric properties and behavior first involves generating (16) a yarn model from fiber parameters, which may be empirically determined. The yarn model is homogenised (18, 20) to produce a homogenous representation of the yarn (YMM), suitable for use in finite element analysis. The method may then, secondly, involve generating (24) a fabric weave model by finite element analysis of the yarn representation (YMM). The fabric model is then also homogenised (26, 28) to produce a homogeneous representation of the fabric (FMM), suitable for use in finite element analysis. Finite element analysis of the fabric representation (FMM) can then be used to assess the suitability of various fabric materials for technical applications.

Abstract: The present invention provides a method for adjusting a center frequency of a filter utilized for extracting information carried via a target channel. The method includes: detecting adjacent channel interference (ACI) for the target channel to generate a channel interference information; and adjusting the center frequency of the filter for the target channel according to the channel interference information.

Abstract: Non-gelatin film materials, e.g. films of modified cellulose materials find use as dosage forms. Substances are incorporated into the film matrix and films thus prepared may be administered orally, or otherwise internally, or epidermally. The administable form may comprise a matrix which contains at least one water soluble polymer in the form of a film, in addition to at least one active ingredient, to produce a therapeutic, organoleptic or cosmetic effect.

Abstract: An LCD (liquid crystal display) power supply includes an AC to DC converter circuit, a transformer, a DC to AC converter, and a feedback circuit. The AC to DC converter circuit couples an AC power supply to generate a DC signal. The DC to AC converter couples the DC signal to a primary side of the transformer and alternates polarities thereof so that an AC signal is generated on a secondary side of the transformer to supply for a load. The feedback circuit receives a first feedback signal indicative of power being supplied to the load and modulates the DC signal generated by the AC to DC converter circuit according to the first feedback signal.

Abstract: An output buffer and a source driver using the same are provided. The output buffer includes an input stage module, a first output stage module, a second output stage module, and a first control module. The input stage module generates a first bias signal via a first connection terminal according to a driving signal and a output signal. The first output stage module generates the output signal in response to the first bias signal via an output terminal of the output buffer. The second output stage module generates a second bias signal in response to the first bias signal via a second connection terminal, and controls a first switch in the second output stage module. The first control module selectively connects a first current source to the output terminal of the output buffer or to the second connection terminal of the second output stage module according to an indication signal.