Abstract: An arithmetic logic unit (ALU) including a binary, parallel adder and multiplier to perform arithmetic operations is described. The ALU includes an adder circuit coupled to a multiplexer to receive input operands that are directed to either an addition operation or a multiplication operation. During the multiplication operation, the ALU is configured to determine partial product operands based on first and second operands and provide the partial product operands to the adder circuit via the multiplexer, and the adder circuit is configured to provide an output having a value equal to a product of the first operand second operands. During an addition operation, the ALU is configured to provide the first and second operands to the adder circuit via the multiplexer, and the adder circuit is configured to provide the output having a value equal to a sum of the first and second operands.

Abstract: Techniques for multi-label document classification are described. Clustering is used to cluster labels in a set. A machine learning model including a multi-label classifier for each cluster is created, the multi-label classifier for a given cluster to classify a document with one or more of the labels in the cluster.

Abstract: A computer system having a host coupled to a storage device via a peripheral component interconnect express bus. The host communicates with the storage device in accordance with a non-volatile memory host controller interface specification. The host provides a customized module containing instructions for performing the operations of a customized command. The host sends an idle time command to the storage device for execution at an idle time. In response to a determination that the storage device is in an idle state, the storage device executes the idle time command, during which the module may be used by the controller of the storage device.

Abstract: Some embodiments include an integrated assembly having a first deck which has first memory cells, and having a second deck which has second memory cells. The first memory cells have first control gate regions which include a first conductive material vertically between horizontally-extending bars of a second conductive material. The second memory cells have second control gate regions which include a fourth conductive material along an outer surface of a third conductive material. A pillar passes through the first and second decks. The pillar includes a dielectric-barrier material laterally surrounding a channel material. The first and fourth materials are directly against the dielectric-barrier material. Some embodiments include methods of forming integrated assemblies.

Abstract: A system includes a memory array and control logic, operatively coupled to the memory array, to perform operations including causing, during chip initialization, a first attempt of a chip initialization process to be performed based on a first configuration. The first configuration includes a first set of control settings for reading a block of the memory array during the first attempt. The operations further include determining that the first attempt has failed, and, in response to determining that the first attempt has failed, causing an automatic chip initialization retry process to be performed. Causing the automatic chip initialization retry process to be performed includes causing a second attempt of the chip initialization process to be performed using a second configuration. The second configuration includes a second set of control settings different from the first set of control settings for reading the block during the second attempt.

Abstract: A technology is described for a device shadowing service that manages device states. An example method may include receiving a state change message associated with a device that a subcomponent of the device has assumed a first state. In response to the state change message, a subcomponent representation associated with a device representation may be updated to indicate the first state received, where the device representation represents the device and the subcomponent representation represent the subcomponent of the device. Thereafter, a request may be received for the first state of the subcomponent of the device. The first state indicated by the subcomponent representation associated with the device representation may be determined, and the first state may be returned in response to the request.

Abstract: A method of forming an electronic device comprises forming a stack structure comprising vertically alternating insulative structures and additional insulative structures, and forming pillars comprising a channel material and at least one dielectric material vertically extending through the stack structure. The method comprises removing the additional insulative structures to form cell openings, forming a first conductive material within a portion of the cell openings, and forming a fill material adjacent to the first conductive material and within the cell openings. The fill material comprises sacrificial portions. The method comprises removing the sacrificial portions of the fill material, and forming a second conductive material within the cell openings in locations previously occupied by the sacrificial portions of the fill material. Related electronic devices, memory devices, and systems are also described.

Abstract: Methods, systems, and media are disclosed for reconstructing bioelectronic lead placement. In some embodiments, the disclosed system can include a processor configured to determine relationships between EP signals of one or more pairs of a plurality of electrodes over one or more sampling time periods, wherein the plurality electrodes are separately placed on a patient's body for collecting the EP signals, and to reconstruct geometry of the plurality of electrodes based on the relationships between the EP signals.

Abstract: Described are medias, systems, and computer-implemented methods to detect improper residency status by performing a data mining task to data source to detect one or more improper residency indicia, applying a machine learning algorithm to identify an initial candidate, calculating a probability that the initial candidate has an improper residency status, and validating the detection. Further described are medias, systems, and computer-implemented methods to detect improper occupancy tax status. Further described are medias, systems, and computer-implemented methods to detect an improper homeowner exemption.

Abstract: Systems, methods, and computer program product embodiments are disclosed for performing electrophysiology (EP) signal processing. An embodiment includes an electrocardiogram (ECG) circuit board configured to process an ECG signal. The embodiment further includes a plurality of intracardiac (IC) circuit boards, each configured to process a corresponding IC signal. The ECG circuit board and the plurality of IC circuit boards share substantially a same circuit configuration and components. The ECG circuit board further processes the ECG signal using substantially a same path as each IC circuit board uses to process its corresponding IC signal.

Abstract: Embodiments described herein relate to divided energy electrochemical cells and electrochemical cell systems. Divided energy electrochemical cells and electrochemical cell systems include a first electrochemical cell and a second electrochemical cell connected in parallel. Both electrochemical cells include a cathode disposed on a cathode current collector, an anode disposed on an anode current collector, and a separator disposed between the anode and the cathode. In some embodiments, the first electrochemical cell can have different performance properties from the second electrochemical cell. For example, the first electrochemical cell can have a high energy density while the second electrochemical cell can have a high power density. In some embodiments, the first electrochemical cell can have a battery chemistry, thickness, or any other physical/chemical property different from those properties of the second electrochemical cell.

Abstract: An innovative low-bit-width device may include a first digital-to-analog converter (DAC), a second DAC, a plurality of non-volatile memory (NVM) weight arrays, one or more analog-to-digital converters (ADCs), and a neural circuit. The first DAC is configured to convert a digital input signal into an analog input signal. The second DAC is configured to convert a digital previous hidden state (PHS) signal into an analog PHS signal. NVM weight arrays are configured to compute vector matrix multiplication (VMM) arrays based on the analog input signal and the analog PHS signal. The NVM weight arrays are coupled to the first DAC and the second DAC. The one or more ADCs are coupled to the plurality of NVM weight arrays and are configured to convert the VMM arrays into digital VMM values. The neural circuit is configured to process the digital VMM values into a new hidden state.

Abstract: A method of preventive well maintenance with pumping equipment in the well for well rehabilitation using CO2 with varying lengths of producing intervals utilizing varying methods to deliver cleaning energy and varying porosity of aquifers to determine varying quantities of energy over the entire well structure.

Abstract: Systems and methods are provided to retrieve or analyze usage data collected from a device or a facility where the device, optionally with devices are located, and identify useful features for making a diagnosis of the device. The diagnosis can be made before a system failure to reduce down time and inefficient use of the device, or after the system failure to expedite and facilitate diagnosis and repair. In addition to the usage data, such as energy and resource consumption, the system can also obtain information relating to the facility and the device's external environment which can be used for normalizing the usage data. Further, based on the diagnosis, the system can make suitable recommendations for repair, replacement, maintenance and upgrade.

Abstract: Techniques for enhancing an image are described. For example, a lower-resolution image from a video file may be enhanced using a trained neural network applying the trained neural network on the lower-resolution image to remove artifacts by removing artifacts by generating, using a layer of the trained neural network, a residual value based on the proper subset of the received image and at least one corresponding image portion of a preceding lower resolution image in the video file and at least one corresponding image portion of a subsequent lower resolution image in the video file, upscale the lower-resolution image using bilinear upsampling, and combine the upscaled received image and residual value to generate an enhanced image.

Abstract: A travelling wave mixer (TWM) is provided that includes an input artificial transmission line configured to transmit an input signal, an output artificial transmission line configured to transmit an output signal, a local oscillator (LO) artificial transmission line configured to transmit an LO signal, and a plurality of mixer stages connected in parallel between the output artificial transmission and the input artificial transmission line. Each of the mixer stages includes an input amplifier, a mixer and an output amplifier connected in series between the input artificial transmission line and the output artificial transmission line, where an input of the mixer receives an output of the input amplifier, and an output of the mixer is applied to an input of the output amplifier.

Abstract: Several aspects of the present technology are directed toward fan-out packaged semiconductor devices having an integrated shield. The shield can include a conductive wall and a conductive cap over a redistribution structure. The shield can surround or at least partially enclose circuits placed or formed on the redistribution structure. The circuits and/or the conductive cap can be covered by an encapsulant, and the conductive cap can be on an upper surface of an encapsulant.

Abstract: A computer-implemented method for modeling a complete tooth of a patient to facilitate dental and/or orthodontic treatment. The method includes generating a first set of digital data representing a clinical crown; generating a second set of digital data representing a plurality of digital tooth models of a particular tooth type each having a first parameterization; processing the second set of digital data to obtain a third set of digital data representing an average tooth model of the particular tooth type having a second parameterization which is less than the first parameterization; fitting the third set of digital data to the first set of digital data to create a set of digital data representing an interim tooth model; and morphing the set of digital data representing the interim tooth model to substantially mimic the anatomical shape of the clinical crown of the first set of digital data.

Abstract: Some embodiments include conductive interconnects which include the first and second conductive materials, and which extend upwardly from a conductive structure. Some embodiments include integrated assemblies having conductive interconnects.

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices and systems are provided, in which at least a subset of a non-volatile memory array is configured to behave as a volatile memory by erasing or degrading data in the event of a changed power condition such as a power-loss event, a power-off event, or a power-on event. In one embodiment of the present technology, a memory device is provided, comprising a non-volatile memory array, and circuitry configured to store one or more addresses of the non-volatile memory array, to detect a changed power condition of the memory device, and to erase or degrade data at the one or more addresses in response to detecting the changed power condition.