Abstract: A technique facilitates efficient well production in relatively low volume applications, e.g. applications after well pressure and volume taper off for a given well. According to an embodiment, use of an electric submersible progressive cavity pump is enabled in harsh, high temperature downhole environments. A pump stator facilitates long-term use in such harsh environments by providing a composite structure having an outer housing and a thermoset resin layer located within the outer housing and secured to the outer housing. The thermoset resin layer is constructed with an internal surface having an internal thread design. Additionally, an elastomeric layer is located within the thermoset resin layer and has a shape which follows the internal thread. In this manner, the elastomeric layer is able to provide an interior surface generally matching the shape of the internal thread of the thermoset resin layer and arranged for interaction with a corresponding pump rotor.

Abstract: Computing systems and methods for geosciences collaboration are disclosed. In one embodiment, a method for geosciences collaboration includes obtaining a first set of geosciences information from a first computer system of the plurality of computer systems; distributing the first set of geosciences information from the first computer system to at least a second computer system; receiving a user input from the second computer system of the plurality of computer systems, the user input entered manually by a user; providing the user input to the first computer system; in response to providing the user input to the first computer system, receiving a revised set of geosciences information from the first computer system; and repeating the receiving a user input, the providing the user input, and the receiving the revised set of geosciences information until the revised set of geosciences information is determined to satisfy accuracy criteria.

Abstract: A method, system, and device for describing a relationship between objects in a three-dimensional virtual space, and a medium. The method of the present invention includes: for a first-level node under a three-dimensional virtual space node, determining that a position and a rotation direction of an object associated with the node are free; and for a node that is not a first-level node, obtaining a node type of the node and a node type of a parent node of the node, and determining that the object associated with the node maintains or does not maintain a relative position relative to an object associated with the parent node, and maintains or does not maintain a relative rotation direction relative to the object associated with the parent node.

Abstract: The present application discloses a semiconductor device with integrated decoupling alignment features. The semiconductor device includes a first wafer comprising a first substrate having a dielectric stack, a decoupling feature positioned in the dielectric stack under one of the plurality of first alignment marks, a plurality of first alignment marks positioned on the first substrate and parallel to each other; and a second wafer positioned on the first wafer and comprising a plurality of second alignment marks positioned above the plurality of first alignment marks. The plurality of second alignment marks are arranged parallel to the plurality of first alignment marks and adjacent to the plurality of first alignment marks in a top-view perspective. The plurality of first alignment marks and the plurality of second alignment marks comprise a fluorescence material. The decoupling feature has a bottle-shaped cross-sectional profile, and the decoupling feature comprises a porous low-k material.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first dielectric layer on a substrate; first/second upper short axis portions extending along a first direction, separated from each other, and on the first dielectric layer; a common source region in the substrate and adjacent to the first/second upper short axis portions; a first branch drain region in the substrate, adjacent to the first upper short axis portion, and opposite to the common source region; a second branch drain region in the substrate, adjacent to the second upper short axis portion, and opposite to the common source region; and a top electrode on the first dielectric layer and topographically above the first branch drain region and the second branch drain region. The top electrode, the first dielectric layer, and the first/second branch drain regions together configure a programmable unit.

Abstract: The present disclosure provides a data processing method and an apparatus and a related product for increased efficiency of tensor processing. The products include a control module including an instruction caching unit, an instruction processing unit, and a storage queue unit. The instruction caching unit is configured to store computation instructions associated with an artificial neural network operation; the instruction processing unit is configured to parse the computation instructions to obtain a plurality of operation instructions; and the storage queue unit is configured to store an instruction queue, where the instruction queue includes a plurality of operation instructions or computation instructions to be executed in the sequence of the queue. By adopting the above-mentioned method, the present disclosure can improve the operation efficiency of related products when performing operations of a neural network model.

Abstract: An electrostatic capacitive touch panel comprises a first substrate; a first electrode extending in a first direction and a first wiring line connected to the first electrode provided on the first substrate; a second substrate; a second electrode extending in a second direction that is perpendicular to the first direction and a second wiring line provided on the second substrate, wherein the first wiring line includes a first extension portion, the second wiring line includes a second extension portion, the second electrode includes: a first capacitance portion overlapping the first electrode in a plan view; and a first connecting portion having a smaller width in the first direction than does the first capacitance portion, and, with respect to the first extension portion, the second extension portion is located in the positive direction where the first connecting portion is adjacent to the first capacitance portion in the second direction.

Abstract: A method for preparing the memory are provided. The method includes forming a trench at a front side of a semiconductor substrate, wherein the trench defines laterally separate active areas formed of surface regions of the semiconductor substrate; filling an isolation structure in the trench, wherein the isolation structure is filled to a height lower than top surfaces of the active areas; recessing a first group of the active areas from top surfaces of the first group of the active areas, while having top surfaces of a second group of the active areas covered; and forming contact enhancement sidewall spacers to laterally surround top portions of the active areas, respectively.

Abstract: The present application discloses a semiconductor device. The semiconductor device includes a package structure including a first side and a second side opposite to the first side; an interposer structure positioned over the first side of the package structure; a first die positioned over the interposer structure; a second die positioned over the interposer structure; and a plurality of middle interconnectors positioned between the first side of the package structure and the first die and between the first side of the package structure and the second die. The plurality of middle interconnectors respectively includes a middle exterior layer positioned between the first side of the package structure and the interposer structure, a middle interior layer enclosed by the middle exterior layer, and a cavity enclosed by the interposer structure, the package structure, and the middle interior layer.

Abstract: A light guide member includes an incident portion, an emission portion, a reflection portion, and an inclined portion. An internal reflection angle inside the reflection portion and the emission portion is larger than an incident angle of an external light with respect to a first normal line that is a normal line of the emission portion. A first inclination angle that is an inclination angle of the incident portion with respect to the first normal line is smaller than the internal reflection angle. A height from the emission portion to a second side of the incident portion is larger than a distance between the emission portion and the reflection portion. A second inclination angle that is an inclination angle of the inclined portion with respect to the first normal line is smaller than the internal reflection angle.

Abstract: An off-chip driver (OCD), including a pull-up driver and a pull-down driver, is provided. The pull-up driver and the pull-down driver are coupled to an output pad. One of the pull-up driver and the pull-down driver includes a main driving circuit, an auxiliary driving circuit, a connection circuit, and a common impedance. The main driving circuit is used to perform an output driving operation on the output pad, and the auxiliary driving circuit is used to selectively perform the output driving operation on the output pad. A first terminal of the common impedance is coupled to a driving terminal of the main driving circuit and a driving terminal of the auxiliary driving circuit through the connection circuit. A second terminal of the common impedance is coupled to the output pad.

Abstract: A method for determining a target locking time for a delay locked loop of a memory apparatus are provided. The method includes, a system inputting a first set of input signals to the memory apparatus in accordance with a first set of first operational parameters and a set of second operational parameters, the system measuring a first set of output signals from the memory apparatus in response to the first set of input signals to determine whether the delay locked loop fails at any combination of the first set of first operational parameters and the set of second operational parameters, the system determining a first candidate operational parameter from the first set of first operational parameters under which the delay locked loop does not fail for each of the set of second operational parameters, and the system determining the target locking time based on the first candidate operational parameter.

Abstract: A tube clamp for bioprocessing, comprising: a first clamp member (102) having a first end joined to a second end by a crescent shaped body comprising: an interior (118) having a groove (116) extending along the crescent shaped body and including a lower surface joined to a sidewall and a top surface joined to the sidewall by a tapered surface (124), wherein the tapered surface is angled at forty-five degrees relative to the lower surface and the top surface; an exterior surrounding the interior, the exterior including an exterior surface joined to an exterior sidewall by an exterior taper, the exterior taper is angled at forty-five degrees relative to the exterior surface and the exterior sidewall and the exterior sidewall is joined to the top surface; a closure region (112) joined to the first end; and an attachment region (110) joined to the second end; and a second clamp member having a first end joined to a second end by a crescent shaped body comprising: an interior including a groove extending along the

Abstract: The present disclosure is directed to a MEMS-based rotation sensor for use in seismic data acquisition and sensor units having same. The MEMS-based rotation sensor includes a substrate, an anchor disposed on the substrate and a proof mass coupled to the anchor via a plurality of flexural springs. The proof mass has a first electrode coupled to and extending therefrom. A second electrode is fixed to the substrate, and one of the first and second electrodes is configured to receive an actuation signal, and another of the first and second electrodes is configured to generate an electrical signal having an amplitude corresponding with a degree of angular movement of the first electrode relative to the second electrode. The MEMS-based rotation sensor further includes closed loop circuitry configured to receive the electrical signal and provide the actuation signal. Related methods for using the MEMS-based rotation sensor in seismic data acquisition are also described.

Abstract: A power supply apparatus and a discharge method thereof are provided. A control unit detects a cross-voltage across two ends of an AC safety capacitor to generate a detection voltage, compares the detection voltage with a threshold voltage, counts the number of cycles of the detection voltage during a period when the detection voltage does not cross the threshold voltage according to a comparison result between the detection voltage and the threshold voltage, and performs a discharge operation when the number of cycles is greater than or equal to a predetermined value to discharge electric energy stored in the AC safety capacitor.

Abstract: An active matrix substrate includes a touch electrode disposed in a pixel region, a frame touch electrode disposed in a frame region, and a dummy array segment disposed in the frame region. The frame region includes a first dummy region, provided in a position adjacent to the pixel region, where the frame touch electrode is disposed and a second dummy region provided in a position opposite to the pixel region across the first dummy region. In the second dummy region, the frame touch electrode is not disposed, but the dummy array segment is disposed.

Abstract: Communication between the surface and a downhole location, such as a bottomhole assembly and/or an RSS is performed by electromagnetic downlink. Electromagnetic signals are transmitted from the surface through the formation at a frequency of 8 Hz or greater. Electromagnetic signals are transmitted and received while drilling or during drilling activities. In this manner, information and instructions may be transmitted to the BHA while drilling.

Abstract: The present invention relates to a driving method for flicker suppression of a display panel and a driving circuit thereof. The driving circuit includes a source driving circuit and a common voltage generating circuit. The driving method includes driving the source driving circuit to generate at least one first source signal and at least one second source signal, the first source signal corresponds to at least one first pixel on a first scanning line; the second source signal corresponds to at least one second pixel on a second scanning line. The common voltage generating circuit generates at least one common voltage. While driving the first pixel and the second pixel to display the same gray scale image, the first source signal is not equal to the second source signal, or a first common voltage and a second common voltage generated by the common voltage generating circuit are different.