Patents Assigned to Technology, Inc.
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Publication number: 20250151146Abstract: Signaling preference order of links and maximum allowed links for multi-link operation may be provided. First, an Access Point (AP) Multilink Device (MLD) may receive an indication that a non-AP MLD supports preference ordering for requested links (that are indicated in the Per-STA profile sub-elements). Then the AP MLD may indicate that it supports preference ordering for requested links (that are indicated in the Per-STA profile sub-elements). Next, the AP MLD may receive from the non-AP MLD, a desired preference ordering for the requested link. The AP MLD may then consider the desired preference ordering for requested links.Type: ApplicationFiled: November 4, 2024Publication date: May 8, 2025Applicant: Cisco Technology, Inc.Inventors: Binita Gupta, Brian D. Hart
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Publication number: 20250151111Abstract: Irregular absence signaling may be provided. An Access Point (AP) may receive an irregular absence report from a station. The AP may parse the irregular absence report to determine upcoming absence periods of the station for non-Peer-to-Peer (P2P) traffic. The AP may schedule Transmit Opportunity's (TxOPs) of the non-P2P traffic to the station based on the determined upcoming absence periods.Type: ApplicationFiled: July 26, 2024Publication date: May 8, 2025Applicant: Cisco Technology, Inc.Inventors: Brian D. Hart, Malcolm M. Smith, Binita Gupta
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Publication number: 20250148303Abstract: A semantic sensing system includes a processor, a memory and at least one sensing element, wherein the processor is configured to apply semantic drift or entropy to determine affirmative and non-affirmative circumstances based on inputs from the at least one sensing element to cause the system to perform semantic augmentation towards a first endpoint supervisor in relation with the affirmative and non-affirmative determinations.Type: ApplicationFiled: January 13, 2025Publication date: May 8, 2025Applicant: Lucomm Technologies, Inc.Inventor: Lucian Cristache
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Publication number: 20250148545Abstract: A system, method, device, and data platform for managing a tax return. A user profile is received. Client data is automatically aggregated according to the user profile. The client data is tokenized in one or more tokens associated with the client. One or more relevant tax return strategies are determined based on the client data and the one or more tokens. A template tax return is automatically created based on the one or more relevant tax return strategies. The template tax return is populated with the client data to generate the tax return for the client.Type: ApplicationFiled: January 13, 2025Publication date: May 8, 2025Applicant: WiSA Technologies, Inc.Inventors: Alfred Blair Blaikie, III, Nathaniel T. Bradley, Joshua S. Paugh, Edward Braniff, III
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Publication number: 20250151264Abstract: Some embodiments include a method of forming an integrated assembly. A structure is provided to have conductive lines, and to have rails over the conductive lines and extending in a direction which crosses the conductive lines. Each of the rails includes pillars of semiconductor material. The rails have sidewall surfaces along spaces between the rails. The pillars have upper segments, middle segments and lower segments. First-material liners are formed along the sidewall surfaces of the rails. A second material is formed over the liners. First sections of the liners are removed to form gaps between the second material and the sidewall surfaces of the rails. Second sections of the liners remain under the gaps. Conductive material is formed within the gaps. The conductive material is configured as conductive lines which are along the middle segments of the pillars.Type: ApplicationFiled: January 8, 2025Publication date: May 8, 2025Applicant: Micron Technology, Inc.Inventors: Hong Li, Ramaswamy Ishwar Venkatanarayanan, Sanh D. Tang, Erica L. Poelstra
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Publication number: 20250149144Abstract: A computer-implemented method is disclosed. The method includes determining a maximum target heart rate for a user using an electromechanical machine to perform a treatment plan, wherein the electromechanical machine is configured to be manipulated by the user while the user is performing the treatment plan. The method includes receiving, via an interface, an input pertaining to a perceived exertion level of the user, wherein the interface comprises a display configured to present information pertaining to the treatment plan. Based on the perceived exertion level and the maximum target heart rate, the method includes determining an amount of resistance for the electromechanical machine to provide via one or more pedals physically or communicatively coupled to the electromechanical machine. While the user performs the treatment plan, the method includes causing the electromechanical machine to provide the amount of resistance.Type: ApplicationFiled: August 12, 2024Publication date: May 8, 2025Applicant: ROM Technologies, Inc.Inventors: Joel ROSENBERG, Steven MASON
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Publication number: 20250149072Abstract: Some embodiments include an assembly having a stack of alternating dielectric levels and conductive levels. Channel material pillars extend through the stack. Some of the channel material pillars are associated with a first sub-block, and others of the channel material pillars are associated with a second sub-block. Memory cells are along the channel material pillars. An insulative level is over the stack. A select gate configuration is over the insulative level. The select gate configuration includes a first conductive gate structure associated with the first sub-block, and includes a second conductive gate structure associated with the second sub-block. The first and second conductive gate structures are laterally spaced from one another by an intervening insulative region. The first and second conductive gate structures have vertically-spaced conductive regions, and have vertically-extending conductive structures which electrically couple the vertically-spaced conductive regions to one another.Type: ApplicationFiled: January 8, 2025Publication date: May 8, 2025Applicant: Micron Technology, Inc.Inventor: Ugo Russo
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Publication number: 20250151274Abstract: A method used in forming a vertical string of memory cells and a conductive via comprises forming a first lower opening and a second lower opening into a lower material. A first material is formed within the first and second lower openings. An upper material is formed above the lower material and above the first material in the first and second lower openings. A first upper opening is formed through the upper material to the first material in the first lower opening. At least a majority of the first material is removed from the first lower opening through the first upper opening and channel material is formed within the first lower and first upper openings for the vertical string of memory cells being formed. After forming the channel material, a second upper opening is formed through the upper material to the first material in the second lower opening. Conductive material of the conductive via is formed within the second upper opening. Structure embodiments independent of method of formation are disclosed.Type: ApplicationFiled: January 8, 2025Publication date: May 8, 2025Applicant: Micron Technology, Inc.Inventors: Hongbin Zhu, Gurtej S. Sandhu, Kunal R. Parekh
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Publication number: 20250149431Abstract: A manufacturing method of an electronic package includes the following steps. A first interfacial dielectric layer is formed to cover sides of multiple first conductive vias and multiple second conductive vias. Multiple chips are directly bonded to the first and second conductive vias. A base dielectric layer is formed to fill a gap between the adjacent chips. A bridge element is directly bonded to the first conductive vias, such that the bridge element partially overlaps the adjacent chips respectively. A second interfacial dielectric layer and multiple third conductive vias are formed on the first interfacial dielectric layer and the bridge element. A redistribution circuit structure is formed on the second interfacial dielectric layer and the third conductive vias. Multiple conductive bumps are formed on the redistribution circuit structure. An electronic package is also provided.Type: ApplicationFiled: July 8, 2024Publication date: May 8, 2025Applicant: VIA Technologies, Inc.Inventors: Wen-Yuan Chang, Wei-Cheng Chen, Chen-Yueh Kung
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Publication number: 20250143903Abstract: A wearable apparatus for the treatment or prevention of osteopenia or osteoporosis, stimulating bone growth, preserving or improving bone mineral density, and inhibiting adipogenesis is disclosed where the apparatus may generally comprise one or more vibrating elements configured for imparting repeated mechanical loads to the hip, femur, and/or spine of an individual at a frequency and acceleration sufficient for therapeutic effect. These vibrating elements may be secured to the upper body of an individual via one or more respective securing mechanisms, where the securing mechanisms are configured to position the one or more vibrating elements in a direction lateral to the individual, and the position, tension, and efficacy of these vibrating elements may be monitored and/or regulated by one or more accelerometers.Type: ApplicationFiled: January 14, 2025Publication date: May 8, 2025Applicant: Bone Health Technologies, Inc.Inventors: Daniel R. BURNETT, Shane MANGRUM, Timothy TIGNER, Evan S. LUXON, Marcie HAMILTON, Alex YEE, Jose GUTIERREZ
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Publication number: 20250147909Abstract: Instead of an arbitration over the link not considering bursts, a smart scheduler in a solid state drive (SSD) host interface is burst aware. The scheduler considers the type of transactions that are going to be sent over the interface. The scheduler sends the transactions in the most efficient way while maximizing the efficiency over the host DRAM. The schedulers may be calibrated from time to time on-the-fly to find the optimal configurations adapted to the current workload. The scheduler will organize the packets selected by the arbitration module so that the data transfers are sent in a burst of a predetermined sized to the host for optimum performance. For further optimization other packet types are sent in bursts as well.Type: ApplicationFiled: November 6, 2023Publication date: May 8, 2025Applicant: Western Digital Technologies, Inc.Inventors: Shay BENISTY, Amir SEGEV
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Publication number: 20250147874Abstract: Methods, apparatuses, and systems for tensor memory access are described. Multiple data located in different physical addresses of memory may be concurrently read or written by, for example, employing various processing patterns of tensor or matrix related computations. A memory controller, which may comprise a data address generator, may be configured to generate a sequence of memory addresses for a memory access operation based on a starting address and a dimension of a tensor or matrix. At least one dimension of a tensor or matrix may correspond to a row, a column, a diagonal, a determinant, or an Nth dimension of the tensor or matrix. The memory controller may also comprise a buffer configured to read and write the data generated from or according to a sequence of memory of addresses.Type: ApplicationFiled: January 10, 2025Publication date: May 8, 2025Applicant: Micron Technology, Inc.Inventors: Fa-Long Luo, Jaime Cummins, Tamara Schmitz, Jeremy Chritz
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Publication number: 20250145503Abstract: Methods and systems of PFAS destruction in water containing nitrate. The methods and systems include filtering water containing PFAS and nitrate through a membrane selective for PFAS to obtain a membrane reject containing PFAS and nitrate and a filtrate containing nitrate, forming a treatment solution using the membrane reject including diluting the membrane reject and combining the membrane reject with a photosensitizer, a sulfite salt, and a sufficient amount of base such that the treatment solution has a pH of about 10 or more, and irradiating the treatment solution with UV light in a photoreactor to destroy a portion of the PFAS. Before dilution, a concentration of PFAS in the membrane reject may be between about 3 times and about 20 times greater than before the filtering step. Dilution of the membrane reject may include between about a 3 and about a 20 times dilution.Type: ApplicationFiled: January 10, 2025Publication date: May 8, 2025Applicant: Claros Technologies Inc.Inventors: Zekun Liu, Terrance P. Smith, Adam Michael Hilbrands, Nathan Ernst Kamm, Joseph Reuel Levine Tirado, Sonja Elise Moons, John Wilfrid Brockgreitens, Andrew Thomas Healy
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Publication number: 20250147848Abstract: In response to determining that continuous data protection is to be enabled for a particular table of a database service, a service component verifies that automated transmission of change records of the table to a log-structured journal has been configured. A given change record comprises a before-image and an after-image associated with a committed database write, and is assigned a unique sequence number. In response to a determination to restore the table as of a specified point in time, a restore record set is identified from the journal with respect to a selected snapshot of the table. The restore record set includes change records which are not represented in the snapshot and are to be represented in the restored table. A restore result table is created using the selected snapshot and the restore record set.Type: ApplicationFiled: January 10, 2025Publication date: May 8, 2025Applicant: Amazon Technologies, Inc.Inventors: Akshat Vig, Parikshit Shivajirao Pol, Subramanian Sankara Subramanian, Rama Krishna Sandeep Pokkunuri, Rajaprabhu Thiruchi Loganathan, Harini Chandrasekhraran
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AUTOMATIC DEVELOPMENT AND ENHANCEMENT OF DEEP LEARNING MODEL FOR DATA EXTRACTION USING FEEDBACK LOOP
Publication number: 20250148278Abstract: Systems and methods for deep learning model development for data extraction using a feedback loop. A system generates an interactive graphical user interface (GUI) on one or more user devices for displaying a document with data extracted from the document by a data extraction model together with a user interaction tool allowing the user to correct the extracted data. The system receives, via the interactive GUI, correction information for the extracted data and monitoring performance characteristics of the extraction model in real-time based on the user correction information. The system automatically updates and trains the extraction model using the correction information responsive to detecting that the performance characteristics meet a predetermined performance reduction condition.Type: ApplicationFiled: November 7, 2023Publication date: May 8, 2025Applicant: ICE Mortgage Technology, Inc.Inventors: Yuelin Long, Amit Pradeep Joglekar, Prabhakar Gundugola, Naman Agarwal -
Publication number: 20250150239Abstract: A method to transmit data packets includes: in a first transceiver, that includes multiple RF transmitters and an RF receiver, receiving an ACK signal from a second transceiver; determining if a data packet was successfully received, and if so, removing the data packet from the queue. If the queue is empty, the method ends. If not, the method proceeds with the next data packet, determines if the ACK has been received, and if it includes an RF mode with diversity information. If there is no diversity information, the data packet is transmitted conventionally. If there is an RF mode with diversity information, the method transmits the data packet using information from the RF mode. Using the RF mode may include replacing PHY information and activating and setting transmitter frequencies for multiple RF transmitters.Type: ApplicationFiled: January 12, 2025Publication date: May 8, 2025Applicant: Spearix Technologies, Inc.Inventors: Manas Behera, Juan Conchas
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Publication number: 20250151284Abstract: A memory array comprises vertically-alternating tiers of insulative material and memory cells, with the memory cells individually comprising a transistor comprising first and second source/drain regions having a channel region there-between and a gate operatively proximate the channel region. At least a portion of the channel region is horizontally-oriented for horizontal current flow in the portion between the first and second source/drain regions. A capacitor of the memory cell comprises first and second electrodes having a capacitor insulator there-between. The first electrode is electrically coupled to the first source/drain region. A horizontal longitudinally-elongated sense line is in individual of the memory-cell tiers. Individual of the second source/drain regions of individual of the transistors that are in the same memory-cell tier are electrically coupled to the horizontal longitudinally-elongated sense line in that individual tier of memory cells.Type: ApplicationFiled: January 13, 2025Publication date: May 8, 2025Applicant: Micron Technology, Inc.Inventor: Durai Vishak Nirmal Ramaswamy
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Publication number: 20250145206Abstract: In an aspect, a carriage for guided autonomous locomotion may including a computing device configured to receive sensor inputs from a plurality of sensors attached to the carriage; determine a real-time orientation and environmental surroundings of the carriage based on the sensor inputs; initiate a corrective action based on the orientation and environmental surroundings of the carriage structure, wherein initiating the corrective action includes initiating and adjusting a rocking mode of the carriage based on the real-time orientation and environmental surroundings of the carriage based on the sensor inputs; engaging power-assisted braking to control deceleration of the carriage based on the sensor inputs; and generating and transmitting an alert regarding at least the rocking mode of the carriage.Type: ApplicationFiled: December 20, 2024Publication date: May 8, 2025Applicant: GlüxKind Technologies Inc.Inventors: Anne Hunger, Zi Wen Huang, Check Hay Janson Chan, Anderson Jia Lin Kwan
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Publication number: 20250150441Abstract: Systems and methods for uses and/or improvements to blockchain and blockchain technology, particularly to provide a scalable solution to the aforementioned security and privacy concerns. As one example, systems and methods are described herein for a double-layer restriction subnet architecture that overcomes the technical limitations of conventional blockchains, whether public or permissioned, and subnets thereof. The double-layer restriction subnet architecture comprises a series of permissioned subnets, which provides both the security/privacy benefits of permissioned blockchains but also the scalability of subnet efficiency.Type: ApplicationFiled: July 25, 2024Publication date: May 8, 2025Applicant: Citigroup Technology, Inc.Inventors: Aharon Baruch HABER, Shobhit MAINI, Haiping CHOO
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Publication number: 20250150729Abstract: An image sensor comprises a pixel array having a color filter array including a minimal repeating unit, where the minimal repeating unit consists of 4×4 pixels including two red pixels, four green pixels, two blue pixels, and eight clear pixels. When clear pixels are saturated and blooming, a blue pixel is affected by three or two clear pixels, but not four clear pixels.Type: ApplicationFiled: November 6, 2023Publication date: May 8, 2025Applicant: OmniVision Technologies, Inc.Inventors: Ryuji Tomita, Shunsuke Suzuki